> Subject: [PATCH v4 08/10] drm/i915: override Snps's VS/PE when requested
>
> Add accessor function for Snps to read requested table from VBT #57.
> Parse the requested table and transform data into port's buffer.
>
> For C20, use 6th table if encoder supports DP 2.0 or higher. Otherwise use 5th
> table for DP.
>
> For C20, tables 1-4 are not used at all and are most likely to be zeroed. 5th
> table
> is used for any mode below DP 2.0 (exclusive). 6th table is used for any mode
> above DP 2.0 (inclusive).
>
> For C10, use 2nd table for external DP if encoder supports any mode beyond or
> including HBR2. Use 1st table if external DP encoder supports anything lower
> than HBR2. For eDP, use 4th table if encoder supports HBR3. Otherwise use 3rd
> table for eDP.
>
> For C10, 1st table is used for external DP with modes below HBR2 (exclusive).
> 1st table is also used as a fallback for non-DPs. 2nd table is used for
> external DP
> with modes higher than HBR2 (inclusive).
> 3rd table is used for eDP with modes lower than HBR3 (exclusive). 4th table is
> used for eDP with modes higher than HBR3 (inclusive).
>
> Indices for other tables have not yet been observed to be used as of now.
>
> There are no changes to intel_ddi_dp_level() since selection of correct row of
> intel_ddi_buf_trans_entry is same as when no override request has been done.
>
> v3->v4
> - stick to solely changing VBT data into current structures (Jani)
> - move iterator declaration to declaration block (Suraj)
>
> v2->v3
> - remove unnecessary braces from if block (Suraj)
> - return -EINVAL instead of -1 (Suraj)
>
> Signed-off-by: Michał Grzelak <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 34 +++++++++++++++
> drivers/gpu/drm/i915/display/intel_bios.h | 3 ++
> .../drm/i915/display/intel_ddi_buf_trans.c | 43 ++++++++++++++++++-
> .../drm/i915/display/intel_ddi_buf_trans.h | 17 ++++++++
> 4 files changed, 95 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 4f1a7d5101c6..2d357d332cb0 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -3899,6 +3899,40 @@ intel_bios_encoder_get_lt_vspeo(const struct
> intel_bios_encoder_data *devdata,
> return vspeo;
> }
>
> +const struct intel_ddi_buf_trans *
> +intel_bios_encoder_get_cx0_vspeo(const struct intel_bios_encoder_data
> *devdata,
> + int idx)
> +{
> + struct intel_display *display = devdata->display;
> + struct intel_ddi_buf_trans *vspeo = (void *) devdata->vspeo;
> + union intel_ddi_buf_trans_entry *entries = (void *) vspeo->entries;
> + const u32 *tables = display->vbt.vspeo.tables;
> + int num_columns = display->vbt.vspeo.num_columns;
> + int num_rows = display->vbt.vspeo.num_rows;
> + size_t offset = 0;
> + int level;
> +
> + INTEL_DISPLAY_STATE_WARN(display, idx < _C20_unused0 || idx >
> C20_DP2X,
> + "Cx0 requested invalid VS/PE-O table: %d\n",
> idx);
Same comment on this as previous commit
> +
> + offset += idx * num_rows * num_columns;
> +
> + for (level = 0; level < num_rows; level++) {
> + u32 vswing = tables[offset];
> + u32 pre_cursor = tables[offset+1];
Space around operator.
> + u32 post_cursor = tables[offset+2];
Ditto.
> +
> + entries[level].snps.vswing = vswing;
> + entries[level].snps.pre_cursor = pre_cursor;
> + entries[level].snps.post_cursor = post_cursor;
> +
> + offset += num_columns;
> + }
> +
> + vspeo->num_entries = num_rows;
> + return vspeo;
> +}
> +
> bool intel_bios_encoder_is_dedicated_external(const struct
> intel_bios_encoder_data *devdata) {
> return devdata->display->vbt.version >= 264 && diff --git
> a/drivers/gpu/drm/i915/display/intel_bios.h
> b/drivers/gpu/drm/i915/display/intel_bios.h
> index 73786832b402..b153c009efc9 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.h
> +++ b/drivers/gpu/drm/i915/display/intel_bios.h
> @@ -76,6 +76,9 @@ intel_bios_encoder_data_lookup(struct intel_display
> *display, enum port port); const struct intel_ddi_buf_trans *
> intel_bios_encoder_get_lt_vspeo(const struct intel_bios_encoder_data
> *devdata,
> int table);
> +const struct intel_ddi_buf_trans *
> +intel_bios_encoder_get_cx0_vspeo(const struct intel_bios_encoder_data
> *devdata,
> + int table);
>
> bool intel_bios_encoder_requests_vspeo(const struct
> intel_bios_encoder_data *devdata); bool
> intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data
> *devdata); diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> index 68258fbfa43e..3b444665c31d 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> @@ -1786,6 +1786,41 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder
> *encoder,
> return intel_get_buf_trans(&xe3plpd_lt_trans_dp14,
> n_entries); }
>
> +static int
> +snps_get_c10_vspeo_index(struct intel_encoder *encoder,
Should be mtl_get_c10....
> + const struct intel_crtc_state *crtc_state) {
> + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
> + if (crtc_state->port_clock > 540000)
> + return C10_EDP_HBR3;
> + else
> + return C10_EDP_NON_HBR3;
> + }
> +
> + if (intel_crtc_has_dp_encoder(crtc_state)) {
> + if (crtc_state->port_clock > 270000)
> + return C10_DP14_HBR2_HBR3;
> + else
> + return C10_DP14_RBR_HBR;
> + }
> +
> + return -EINVAL;
> +}
> +
> +static int
> +snps_get_c20_vspeo_index(struct intel_encoder *encoder,
> + const struct intel_crtc_state *crtc_state) {
Should be mtl_get_c20....
> + if (intel_crtc_has_dp_encoder(crtc_state)) {
> + if (intel_dp_is_uhbr(crtc_state))
> + return C20_DP2X;
> + else
> + return C20_DP14;
> + }
> +
> + return -EINVAL;
> +}
> +
> static int
> xe3plpd_get_lt_vspeo_index(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state) @@ -
> 1819,10 +1854,14 @@ void intel_ddi_buf_trans_init(struct intel_encoder
> *encoder)
> encoder->get_phy_vspeo_index =
> xe3plpd_get_lt_vspeo_index;
> encoder->get_phy_vspeo = intel_bios_encoder_get_lt_vspeo;
> } else if (DISPLAY_VER(display) >= 14) {
> - if (intel_encoder_is_c10phy(encoder))
> + encoder->get_phy_vspeo =
> intel_bios_encoder_get_cx0_vspeo;
> + if (intel_encoder_is_c10phy(encoder)) {
> encoder->get_buf_trans = mtl_get_c10_buf_trans;
> - else
> + encoder->get_phy_vspeo_index =
> snps_get_c10_vspeo_index;
> + } else {
> encoder->get_buf_trans = mtl_get_c20_buf_trans;
> + encoder->get_phy_vspeo_index =
> snps_get_c20_vspeo_index;
> + }
> } else if (display->platform.dg2) {
> encoder->get_buf_trans = dg2_get_snps_buf_trans;
> } else if (display->platform.alderlake_p) { diff --git
> a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> index 560892b4ef8c..7d3e0b7535fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> @@ -84,6 +84,23 @@ enum intel_lt_vspeo {
> LT_DP2X
> };
>
> +enum intel_c20_vspeo {
> + _C20_unused0 = 0,
> + _C20_unused1,
> + _C20_unused2,
> + _C20_unused3,
Above not needed
Regards,
Suraj Kandpal
> +
> + C20_DP14 = 4,
> + C20_DP2X
> +};
> +
> +enum intel_c10_vspeo {
> + C10_DP14_RBR_HBR = 0,
> + C10_DP14_HBR2_HBR3,
> + C10_EDP_NON_HBR3,
> + C10_EDP_HBR3
> +};
> +
> bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
>
> void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
> --
> 2.45.2
