On Thu, 2026-05-28 at 13:34 +0300, Ville Syrjala wrote: > From: Ville Syrjälä <[email protected]> > > While DG2 is using hardcoded numbers for the memory bandwidth > stuff, let's still print them to aid in debugging as there are > two different SKUs to consider with different bandwidth numbers. > > Signed-off-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_bw.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c > b/drivers/gpu/drm/i915/display/intel_bw.c > index 59df01b8ad7c..f4121223a58b 100644 > --- a/drivers/gpu/drm/i915/display/intel_bw.c > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > @@ -711,6 +711,10 @@ static void dg2_get_bw_info(struct intel_display > *display) > display->bw.max[0].num_planes = U8_MAX; > display->bw.max[0].deratedbw[0] = display->platform.dg2_g11 > ? 38000 : 50000; > > + drm_dbg_kms(display->drm, > + "QGV 0: deratedbw=%u\n", > + display->bw.max[0].deratedbw[0]); > + > /* Bandwidth does not depend on # of planes; set all groups > the same */ > for (i = 1; i < ARRAY_SIZE(display->bw.max); i++) > display->bw.max[i] = display->bw.max[0];
Reviewed-by: Vinod Govindapillai <[email protected]>
