> -----Original Message-----
> From: Dibin Moolakadan Subrahmanian
> <[email protected]>
> Sent: Tuesday, June 16, 2026 9:52 PM
> To: [email protected]; [email protected]
> Cc: Shankar, Uma <[email protected]>; Manna, Animesh
> <[email protected]>; [email protected]
> Subject: [PATCH v6 11/16] drm/i915/display: Enable DC3CO idle protocol in
> ALPM
>
> Add PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL bit definition and set it
> when DC3CO is allowed.
>
> Changes in v2:
> - Squash "Define DC3CO idle protocol bit in PR_ALPM_CTL"
> into this patch (Uma Shankar)
> - Use intel_display_power_dc3co_allowed(display)
> instead of intel_dc3co_allowed(state)
>
> Changes in v5:
> - check only intel_display_power_dc3co_allowed()
> before wiriting PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL (Jani Nikula)
>
> BSpec: 75253
> Signed-off-by: Dibin Moolakadan Subrahmanian
> <[email protected]>
> Reviewed-by: Uma Shankar <[email protected]>
Reviewed-by: Animesh Manna <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_alpm.c | 5 +++++
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 1 +
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index c6963ea420cc..9b6248548f64 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -407,6 +407,11 @@ static void lnl_alpm_configure(struct intel_dp
> *intel_dp,
> if (crtc_state->disable_as_sdp_when_pr_active)
> pr_alpm_ctl |=
> PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
>
> + if (intel_display_power_dc3co_allowed(display))
> + pr_alpm_ctl |=
> PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> + else
> + pr_alpm_ctl &=
> ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +
> intel_de_write(display, PR_ALPM_CTL(display,
> cpu_transcoder),
> pr_alpm_ctl);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 8afbf5a38335..16a9e3af198d 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -268,6 +268,7 @@
>
> #define _PR_ALPM_CTL_A 0x60948
> #define PR_ALPM_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran,
> _PR_ALPM_CTL_A)
> +#define PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL BIT(7)
> #define PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU
> BIT(6)
> #define PR_ALPM_CTL_RFB_UPDATE_CONTROL
> BIT(5)
> #define PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE BIT(4)
> --
> 2.43.0
