> -----Original Message----- > From: Intel-xe <[email protected]> On Behalf Of Vinod > Govindapillai > Sent: Monday, 15 June 2026 23.34 > To: [email protected]; [email protected] > Cc: Govindapillai, Vinod <[email protected]>; > [email protected] > Subject: [PATCH v3 3/7] drm/i915/display: sagv pre/post plane calls to check > pmdemand support > > For pmdemand cases, no need to even calculate the masks based > on the qgv points index. Though the current logic avoids setting > the registers based on the pmdemand support, some qgv point masks > are compared in vain and do nothing. So leave early if pmdemand > is supported. >
Reviewed-by: Mika Kahola <[email protected]> > Signed-off-by: Vinod Govindapillai <[email protected]> > --- > drivers/gpu/drm/i915/display/skl_watermark.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c > b/drivers/gpu/drm/i915/display/skl_watermark.c > index a4ce21d4c024..ec1bfe46edef 100644 > --- a/drivers/gpu/drm/i915/display/skl_watermark.c > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c > @@ -275,6 +275,9 @@ void intel_sagv_pre_plane_update(struct > intel_atomic_state *state) > if (!intel_has_sagv(display)) > return; > > + if (HAS_PMDEMAND(display)) > + return; > + > if (DISPLAY_VER(display) >= 11) > icl_sagv_pre_plane_update(state); > else > @@ -295,6 +298,9 @@ void intel_sagv_post_plane_update(struct > intel_atomic_state *state) > if (!intel_has_sagv(display)) > return; > > + if (HAS_PMDEMAND(display)) > + return; > + > if (DISPLAY_VER(display) >= 11) > icl_sagv_post_plane_update(state); > else > -- > 2.43.0
