On Wed, 2026-07-01 at 18:31 +0300, Imre Deak wrote: > Query the maximum link BW configuration during mode validation and MST > link probing directly from intel_dp_link_caps_get_max_bw_config(), > instead of using the intel_dp_max_link_rate() and > intel_dp_max_lane_count() helpers. > > This makes the max BW link config query uniform across mode validation > and TBT BW calculation, and allows unexporting the > intel_dp_max_link_rate()/intel_dp_max_lane_count() helpers. > > v2: Use the max BW link configuration, instead of the max link limits. > > Signed-off-by: Imre Deak <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 10 ++++++---- > drivers/gpu/drm/i915/display/intel_dp.h | 2 -- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 16 ++++++++++++---- > 3 files changed, 18 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index bc333bc9296b2..b10bbbf0f49bf 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -354,7 +354,7 @@ static int intel_dp_get_max_common_lane_count(struct > intel_dp *intel_dp) > return min3(source_max, sink_max, lane_max); > } > > -int intel_dp_max_lane_count(struct intel_dp *intel_dp) > +static int intel_dp_max_lane_count(struct intel_dp *intel_dp) > { > struct intel_dp_link_caps *link_caps = intel_dp->link.caps; > struct intel_dp_link_config max_link_limits; > @@ -1331,6 +1331,7 @@ intel_dp_mode_valid_format(struct intel_connector > *connector, > struct intel_dp *intel_dp = intel_attached_dp(connector); > enum intel_output_format output_format; > int max_rate, mode_rate, max_lanes, max_link_clock; > + struct intel_dp_link_config max_bw_config; > u16 dsc_max_compressed_bpp = 0; > enum drm_mode_status status; > bool dsc = false; > @@ -1343,8 +1344,9 @@ intel_dp_mode_valid_format(struct intel_connector > *connector, > > output_format = intel_dp_output_format(connector, sink_format); > > - max_link_clock = intel_dp_max_link_rate(intel_dp); > - max_lanes = intel_dp_max_lane_count(intel_dp); > + intel_dp_link_caps_get_max_bw_config(intel_dp->link.caps, > &max_bw_config); > + max_link_clock = max_bw_config.rate; > + max_lanes = max_bw_config.lane_count; > > max_rate = intel_dp_max_link_data_rate(intel_dp, max_link_clock, > max_lanes); > > @@ -1538,7 +1540,7 @@ static void intel_dp_print_rates(struct intel_dp > *intel_dp) > intel_dp_link_caps_print_common_rates(intel_dp->link.caps); > } > > -int > +static int > intel_dp_max_link_rate(struct intel_dp *intel_dp) > { > struct intel_dp_link_caps *link_caps = intel_dp->link.caps; > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h > b/drivers/gpu/drm/i915/display/intel_dp.h > index 13872b8c4975e..9564369ea4852 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.h > +++ b/drivers/gpu/drm/i915/display/intel_dp.h > @@ -111,8 +111,6 @@ void intel_dp_mst_suspend(struct intel_display *display); > void intel_dp_mst_resume(struct intel_display *display); > int intel_dp_rate_limit_len(const int *rates, int len, int max_rate); > int intel_dp_max_source_lane_count(struct intel_digital_port *dig_port); > -int intel_dp_max_link_rate(struct intel_dp *intel_dp); > -int intel_dp_max_lane_count(struct intel_dp *intel_dp); > int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state); > int intel_dp_rate_select(struct intel_dp *intel_dp, int rate); > int intel_dp_rate_index(const int *rates, int len, int rate); > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c > b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index ecc90e8faee11..e113c9e60e67d 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -47,6 +47,7 @@ > #include "intel_display_wa.h" > #include "intel_dp.h" > #include "intel_dp_hdcp.h" > +#include "intel_dp_link_caps.h" > #include "intel_dp_link_training.h" > #include "intel_dp_mst.h" > #include "intel_dp_test.h" > @@ -1476,6 +1477,7 @@ mst_connector_mode_valid_ctx(struct drm_connector > *_connector, > unsigned long bw_overhead_flags = > DRM_DP_BW_OVERHEAD_MST | DRM_DP_BW_OVERHEAD_SSC_REF_CLK; > int min_link_bpp_x16 = fxp_q4_from_int(18); > + struct intel_dp_link_config max_bw_config; > static bool supports_dsc; > int ret; > bool dsc = false; > @@ -1508,8 +1510,9 @@ mst_connector_mode_valid_ctx(struct drm_connector > *_connector, > min_link_bpp_x16 = > intel_dp_compute_min_compressed_bpp_x16(connector, > > INTEL_OUTPUT_FORMAT_RGB); > > - max_link_clock = intel_dp_max_link_rate(intel_dp); > - max_lanes = intel_dp_max_lane_count(intel_dp); > + intel_dp_link_caps_get_max_bw_config(intel_dp->link.caps, > &max_bw_config); > + max_link_clock = max_bw_config.rate; > + max_lanes = max_bw_config.lane_count; > > max_rate = intel_dp_max_link_data_rate(intel_dp, > max_link_clock, max_lanes); > @@ -2135,14 +2138,19 @@ bool intel_dp_mst_crtc_needs_modeset(struct > intel_atomic_state *state, > */ > void intel_dp_mst_prepare_probe(struct intel_dp *intel_dp) > { > - int link_rate = intel_dp_max_link_rate(intel_dp); > - int lane_count = intel_dp_max_lane_count(intel_dp); > + struct intel_dp_link_config max_bw_config; > + int link_rate; > + int lane_count; > u8 rate_select; > u8 link_bw; > > if (intel_dp->link.active) > return; > > + intel_dp_link_caps_get_max_bw_config(intel_dp->link.caps, > &max_bw_config); > + link_rate = max_bw_config.rate; > + lane_count = max_bw_config.lane_count; > + > if (intel_mst_probed_link_params_valid(intel_dp, link_rate, lane_count)) > return; >
Reviewed-by: Luca Coelho <[email protected]> -- Cheers, Luca.
