On Wed, 2026-07-01 at 18:31 +0300, Imre Deak wrote:
> Use the link caps helper to select the maximum eDP link configuration
> for DSC computation, instead of using the separate max rate and lane
> count limits, which may not form a valid configuration after individual
> configs are disabled by fallback.
> 
> This is a step towards unifying configuration selection and iteration
> across connector types and between compute and fallback paths.
> 
> The state computation should likely consider all allowed configurations,
> as noted in the code comment; for now keep the existing eDP DSC behavior
> of selecting the maximum configuration determined by the eDP connector
> rate / lane config iteration order.
> 
> Signed-off-by: Imre Deak <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++++++++++++---
>  1 file changed, 14 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index c6920afb50902..79e3334d24332 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2248,7 +2248,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp 
> *intel_dp,
>                                     int pipe_bpp)
>  {
>       struct intel_display *display = to_intel_display(intel_dp);
> -     const struct intel_connector *connector = 
> to_intel_connector(conn_state->connector);
> +     struct intel_connector *connector = 
> to_intel_connector(conn_state->connector);
>       int min_bpp_x16, max_bpp_x16, bpp_step_x16;
>       int bpp_x16;
>       int ret;
> @@ -2260,8 +2260,19 @@ static int dsc_compute_compressed_bpp(struct intel_dp 
> *intel_dp,
>       max_bpp_x16 = align_max_compressed_bpp_x16(connector, 
> pipe_config->output_format,
>                                                  pipe_bpp, max_bpp_x16);
>       if (intel_dp_is_edp(intel_dp)) {
> -             pipe_config->port_clock = limits->max_rate;
> -             pipe_config->lane_count = limits->max_lane_count;
> +             struct intel_dp_link_config max_link_config;
> +
> +             /*
> +              * FIXME: Clarify why eDP does not use the regular SST BW
> +              * check and instead always uses the maximum link config,
> +              * regardless of intel_dp::use_max_params. Then unify this eDP
> +              * path with the regular DP path.
> +              */

Are you planning to clarify this? Will it be part of your current
refactoring (maybe in later patches)?

> +             if (!intel_dp_get_connector_max_link_config(connector, limits, 
> &max_link_config))
> +                     return -EINVAL;
> +
> +             pipe_config->port_clock = max_link_config.rate;
> +             pipe_config->lane_count = max_link_config.lane_count;
>  
>               pipe_config->dsc.compressed_bpp_x16 = max_bpp_x16;
>  

Regardless:

Reviewed-by: Luca Coelho <[email protected]>

--
Cheers,
Luca.

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