> -----Original Message-----
> From: Intel-xe <[email protected]> On Behalf Of Chaitanya
> Kumar Borah
> Sent: Wednesday, June 17, 2026 2:38 PM
> To: [email protected]; [email protected]; intel-
> [email protected]
> Cc: Samala, Pranay <[email protected]>; Borah, Chaitanya Kumar
> <[email protected]>
> Subject: [v3 11/14] drm/i915/color: Program Pre-CSC registers for SDR
>
> From: Pranay Samala <[email protected]>
>
> Implement plane pre-CSC LUT support for SDR planes.
>
> v2:
> - s/drm_color_lut_extract/drm_color_lut32_extract
>
> v3:
> - Restructure loop to match HDR function pattern
Changes Look Good to me.
Reviewed-by: Uma Shankar <[email protected]>
> Assisted-by: Claude:claude-opus-4.6
> Signed-off-by: Pranay Samala <[email protected]>
> Co-developed-by: Chaitanya Kumar Borah <[email protected]>
> Signed-off-by: Chaitanya Kumar Borah <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 42 ++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> b/drivers/gpu/drm/i915/display/intel_color.c
> index 2a32ab62721c..abf3b3a2e177 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -3992,6 +3992,46 @@ xelpd_load_hdr_pre_csc_lut(struct intel_display
> *display,
> intel_de_write_dsb(display, dsb,
> PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0); }
>
> +static void
> +xelpd_load_sdr_pre_csc_lut(struct intel_display *display,
> + struct intel_dsb *dsb,
> + enum pipe pipe,
> + enum plane_id plane,
> + const struct drm_color_lut32 *pre_csc_lut) {
> + int i, lut_size = 32;
> + u32 lut_val;
> +
> + /*
> + * First 3 planes are HDR, so reduce by 3 to get to the right
> + * SDR plane offset
> + */
> + plane = plane - 3;
> +
> + intel_de_write_dsb(display, dsb,
> + PLANE_PRE_CSC_GAMC_INDEX(pipe, plane, 0),
> + PLANE_PAL_PREC_AUTO_INCREMENT);
> +
> + for (i = 0; i < lut_size + 3; i++) {
> + if (pre_csc_lut) {
> + if (i < lut_size)
> + lut_val =
> drm_color_lut32_extract(pre_csc_lut[i].green, 16);
> + /* else duplicate last lut_val */
> + } else {
> + if (i < lut_size)
> + lut_val = (i * ((1 << 16) - 1)) / (lut_size -
> 1);
> + else
> + lut_val = 1 << 16;
> + }
> +
> + intel_de_write_dsb(display, dsb,
> + PLANE_PRE_CSC_GAMC_DATA(pipe, plane,
> 0),
> + lut_val);
> + }
> +
> + intel_de_write_dsb(display, dsb, PLANE_PRE_CSC_GAMC_INDEX(pipe,
> plane,
> +0), 0); }
> +
> static void
> xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
> const struct intel_plane_state *plane_state) @@
> -
> 4005,6 +4045,8 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
>
> if (icl_is_hdr_plane(display, plane))
> xelpd_load_hdr_pre_csc_lut(display, dsb, pipe, plane,
> pre_csc_lut);
> + else
> + xelpd_load_sdr_pre_csc_lut(display, dsb, pipe, plane,
> pre_csc_lut);
> }
>
> static void
> --
> 2.25.1
