Hi Chaitanya, > -----Original Message----- > From: Intel-xe <[email protected]> On Behalf Of > Chaitanya Kumar Borah > Sent: Thursday, July 9, 2026 5:10 PM > To: [email protected]; [email protected] > Cc: Borah, Chaitanya Kumar <[email protected]> > Subject: [PATCH 2/2] drm/i915/dp: set VSC_SDP MSA delegation only for > capable sinks > > Per DP 1.4a section 2.2.4.3, the MSA MISC1 VSC_SDP bit signals that the sink > should defer colorimetry to the VSC SDP. It should only be set when the sink > advertises DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED and a VSC SDP > with pixel encoding/colorimetry payload will actually be sent. > > Fold the colorimetry_support check into intel_dp_needs_vsc_colorimetry() > so both intel_ddi_set_dp_msa() and intel_dp_compute_vsc_sdp() share a > single consistent gate. > > Assisted-by: GitHub_Copilot:claude-sonnet-4.6 > Signed-off-by: Chaitanya Kumar Borah <[email protected]>
Changes LGTM, Reviewed-by: Pranay Samala <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ > drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++---- > 2 files changed, 12 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index c764472bd69a..13010375e21b 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -469,6 +469,8 @@ void intel_ddi_set_dp_msa(const struct > intel_crtc_state *crtc_state, > * of Color Encoding Format and Content Color Gamut] while sending > * YCBCR 420, HDR BT.2020 signals we should program MSA MISC1 > fields > * which indicate VSC SDP for the Pixel Encoding/Colorimetry Format. > + * Only set the delegation bit when the content needs it and > + * the sink advertises support. > */ > if (intel_dp_needs_vsc_colorimetry(crtc_state, conn_state)) > temp |= DP_MSA_MISC_COLOR_VSC_SDP; > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 93282694c29b..53688c5bef74 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -3163,8 +3163,7 @@ static void intel_dp_compute_vsc_sdp(struct > intel_dp *intel_dp, { > struct drm_dp_vsc_sdp *vsc; > > - if ((!intel_dp->colorimetry_support || > - !intel_dp_needs_vsc_colorimetry(crtc_state, conn_state)) && > + if (!intel_dp_needs_vsc_colorimetry(crtc_state, conn_state) && > !crtc_state->has_psr) > return; > > @@ -3173,7 +3172,6 @@ static void intel_dp_compute_vsc_sdp(struct > intel_dp *intel_dp, > crtc_state->infoframes.enable |= > intel_hdmi_infoframe_enable(DP_SDP_VSC); > vsc->sdp_type = DP_SDP_VSC; > > - /* Needs colorimetry */ > if (intel_dp_needs_vsc_colorimetry(crtc_state, conn_state)) { > intel_dp_compute_vsc_colorimetry(crtc_state, conn_state, > vsc); > @@ -5103,11 +5101,19 @@ bool > intel_dp_needs_vsc_colorimetry(const struct intel_crtc_state *crtc_state, > const struct drm_connector_state *conn_state) { > + struct intel_dp *intel_dp = > + enc_to_intel_dp(to_intel_encoder(conn_state- > >best_encoder)); > + > /* > * As per DP 1.4a spec section 2.2.4.3 [MSA Field for Indication > * of Color Encoding Format and Content Color Gamut], in order to > - * sending YCBCR 420 or HDR BT.2020 signals we should use DP VSC > SDP. > + * send YCBCR 420 or HDR BT.2020 signals we should use DP VSC SDP. > + * Only signal this when the sink advertises VSC SDP colorimetry > + * support. > */ > + if (!intel_dp->colorimetry_support) > + return false; > + > if (crtc_state->output_format == > INTEL_OUTPUT_FORMAT_YCBCR420) > return true; > > -- > 2.25.1
