Add the helpers for getting the max FRL rate with and without DSC for an HDMI sink.
Signed-off-by: Ankit Nautiyal <[email protected]> --- drivers/gpu/drm/i915/display/intel_hdmi.c | 19 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_hdmi.h | 3 +++ 2 files changed, 22 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 95393ec5d561..352a315b0fb0 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -3479,3 +3479,22 @@ intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int num_slices, return dsc_bpp_x16; } + +int intel_hdmi_sink_max_frl_rate(struct drm_connector *connector) +{ + int max_lanes = connector->display_info.hdmi.max_lanes; + int rate_per_lane = connector->display_info.hdmi.max_frl_rate_per_lane; + + return max_lanes * rate_per_lane; +} + +int intel_hdmi_sink_dsc_max_frl_rate(struct drm_connector *connector) +{ + int max_lanes = connector->display_info.hdmi.dsc_cap.max_lanes; + int rate_per_lane = connector->display_info.hdmi.dsc_cap.max_frl_rate_per_lane; + + if (!max_lanes || !rate_per_lane) + return 0; + + return max_lanes * rate_per_lane; +} diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h index 072c8d228697..f7a494df19e6 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.h +++ b/drivers/gpu/drm/i915/display/intel_hdmi.h @@ -80,4 +80,7 @@ void hsw_read_infoframe(struct intel_encoder *encoder, void intel_hdmi_poll_for_scrambling_enable(const struct intel_crtc_state *crtc_state, struct drm_connector *_connector); +int intel_hdmi_sink_max_frl_rate(struct drm_connector *connector); +int intel_hdmi_sink_dsc_max_frl_rate(struct drm_connector *connector); + #endif /* __INTEL_HDMI_H__ */ -- 2.50.1
