On 8/4/2026 3:19 AM, Michał Grzelak wrote:
GLK+ hardware supports 3D LUT. Disable the feature for pre-GLK
platforms.
Add .has_3dlut field into struct intel_display_runtime_info. Use the
field to store whether 3D LUT is enabled. Initialize the field to 1 on
GLK+.
Add macro for checking 3D LUT's support. Use it while checking whether
CRTC has 3D LUT enabled.
v1->v2
- use either runtime info flag or display version check (Jani)
- don't initialize runtime info flag to 0 (Jani)
Bspec: 15585
Cc: Chaitanya Kumar Borah <[email protected]>
Cc: <[email protected]>
Fixes: 65db7a1f9cf7 ("drm/i915/color: Add 3D LUT to color pipeline")
I am not sure if you need the fixes tag for this patch because 3D LUT is
already gated on DISPLAY_VER(display) >= 12. More on it on Patch 3.
Signed-off-by: Michał Grzelak <[email protected]>
---
drivers/gpu/drm/i915/display/intel_color.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_device.c | 5 +++++
drivers/gpu/drm/i915/display/intel_display_device.h | 2 ++
3 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 87ced9f6ff40..ffdefb51a264 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4258,6 +4258,9 @@ intel_color_load_plane_luts(struct intel_dsb *dsb,
bool
intel_color_crtc_has_3dlut(struct intel_display *display, enum pipe pipe)
{
+ if (!HAS_3DLUT(display))
+ return false;
+
if (DISPLAY_VER(display) >= 12)
return pipe == PIPE_A || pipe == PIPE_B;
else
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
b/drivers/gpu/drm/i915/display/intel_display_device.c
index f17fc2c68472..4c09f35644ba 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -864,6 +864,7 @@ static const struct platform_desc glk_desc = {
GLK_COLORS,
.__runtime_defaults.ip.ver = 10,
+ .__runtime_defaults.has_3dlut = 1,
},
STEP_INFO(glk_steppings),
};
@@ -899,6 +900,7 @@ static const struct platform_desc glk_desc = {
ICL_COLORS, \
\
.__runtime_defaults.ip.ver = 11, \
+ .__runtime_defaults.has_3dlut = 1, \
.__runtime_defaults.has_dmc = 1, \
.__runtime_defaults.has_dsc = 1, \
.__runtime_defaults.has_hdcp = 1, \
@@ -990,6 +992,7 @@ static const struct platform_desc ehl_desc = {
ICL_COLORS, \
\
.__runtime_defaults.ip.ver = 12, \
+ .__runtime_defaults.has_3dlut = 1, \
.__runtime_defaults.has_dmc = 1, \
.__runtime_defaults.has_dsc = 1, \
.__runtime_defaults.has_hdcp = 1, \
@@ -1156,6 +1159,7 @@ static const struct platform_desc adl_s_desc = {
TGL_CURSOR_OFFSETS,
\
\
.__runtime_defaults.ip.ver = 13,
\
+ .__runtime_defaults.has_3dlut = 1,
\
.__runtime_defaults.has_dmc = 1,
\
.__runtime_defaults.has_dsc = 1,
\
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
\
@@ -1335,6 +1339,7 @@ static const struct platform_desc dg2_desc = {
BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
\
BIT(TRANSCODER_C) | BIT(TRANSCODER_D),
\
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A) | BIT(INTEL_FBC_B),
\
+ .__runtime_defaults.has_3dlut = 1,
\
.__runtime_defaults.has_dmc = 1,
\
.__runtime_defaults.has_dsc = 1,
\
.__runtime_defaults.has_hdcp = 1,
\
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
b/drivers/gpu/drm/i915/display/intel_display_device.h
index 7121e7cd9512..5300c6ab99e7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -147,6 +147,7 @@ struct intel_display_platforms {
#define HAS_128B_Y_TILING(__display) (!(__display)->platform.i915g && !(__display)->platform.i915gm)
#define HAS_2PPC(__display) (DISPLAY_VER(__display) >= 10)
+#define HAS_3DLUT(__display)
(DISPLAY_RUNTIME_INFO(__display)->has_3dlut)
#define HAS_4TILE(__display) ((__display)->platform.dg2 ||
DISPLAY_VER(__display) >= 14)
#define HAS_ASYNC_FLIPS(__display) (DISPLAY_VER(__display) >= 5)
#define HAS_AS_SDP(__display) (DISPLAY_VER(__display) >= 13)
@@ -304,6 +305,7 @@ struct intel_display_runtime_info {
u8 fbc_mask;
+ bool has_3dlut;
bool has_hdcp;
bool has_dmc;
bool has_dsc;
