> -----Original Message----- > From: Intel-xe <[email protected]> On Behalf Of Ankit > Nautiyal > Sent: Thursday, June 11, 2026 1:03 PM > To: [email protected]; [email protected] > Cc: [email protected]; Murthy, Arun R <[email protected]>; > [email protected]; Nautiyal, Ankit K <[email protected]> > Subject: [PATCH v4 03/12] drm/i915/intel_dip: Add check for DP encoder > > At the moment, the common register for programming Transmission line for > Extended Metadata Packet and Adaptive-Sync Secondary Data Packet > (EMP_AS_SDP_TL) is only used to program Adaptive-Sync SDP (AS SDP). > > Since VRR and Video Timing Extended Metadat Packet (VTEMP) are not yet > implemented for HDMI, add an explicit check to write the register only for DP > encoders (that may use AS SDP) and reset the register for non-DP encoders. > > In subsequent changes, instead of directly writing the value, appropriate > helpers > will be called, that will supply the transmission line for these packets. > > Signed-off-by: Ankit Nautiyal <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dip.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dip.c > b/drivers/gpu/drm/i915/display/intel_dip.c > index 2e2bdb2b199c..450a599b5053 100644 > --- a/drivers/gpu/drm/i915/display/intel_dip.c > +++ b/drivers/gpu/drm/i915/display/intel_dip.c > @@ -26,14 +26,19 @@ void intel_dip_write_emp_as_sdp_tl(const struct > intel_crtc_state *crtc_state) { > struct intel_display *display = to_intel_display(crtc_state); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > + u32 transmission_line = 0; > > if (!HAS_EMP_AS_SDP_TL(display)) > return; > /* > - * Since currently we support VRR only for DP/eDP, so this is > programmed > - * only for Adaptive Sync SDP to Vsync start. > + * Since currently we support VRR only for DP/eDP, program the register > + * for Adaptive Sync SDP using vsync start. For non-DP encoders, > + * the register is reset to 0. Nit: Since we currently Otherwise LGTM Reviewed-by: Suraj Kandpal <[email protected]> */ > + if (intel_crtc_has_dp_encoder(crtc_state)) > + transmission_line = crtc_state->vrr.vsync_start; > + > intel_de_write(display, > EMP_AS_SDP_TL(display, cpu_transcoder), > - EMP_AS_SDP_DB_TL(crtc_state->vrr.vsync_start)); > + EMP_AS_SDP_DB_TL(transmission_line)); > } > -- > 2.45.2
