RE: [PATCH v4 06/10] drm/i915/display_wa: Add support for Wa_14021768792

Thu, 15 Oct 2026 12:41:06 -0700 


> -----Original Message-----
> From: Intel-gfx <[email protected]> On Behalf Of Suraj
> Kandpal
> Sent: 17 September 2026 10:37
> To: [email protected]; [email protected]
> Cc: Nautiyal, Ankit K <[email protected]>; Murthy, Arun R
> <[email protected]>; Kandpal, Suraj <[email protected]>
> Subject: [PATCH v4 06/10] drm/i915/display_wa: Add support for
> Wa_14021768792
> 
> From: Ankit Nautiyal <[email protected]>
> 
> Some BMG ultrajoiner configurations require support for Link M/N ratios
> between 10.0 and 15.0. This range is not natively supported and requires a
> workaround.
> 
> Wa_14021768792 enables this support by utilizing HDMI_EMP_DATA,
> CHICKEN_TRANS and the extended bits in the LINK_N register.
> 
> Add the necessary logic to enable the workaround on applicable platforms.
> The underlying mechanism comes from the display C0, so it is gated on
> display stepping C0 and later.
> 
> v2:
> -Don't include i915_drv.h and don't use struct drm_i915_private under
> display/. Use display->platform.battlemage, which names the affected
> platform directly, instead of IS_DGFX() combined with a display version check.
> (Jani) -Rebase on the reworked display WA framework, where the condition
> goes directly into the __intel_display_wa() switch.
> 
> Bspec: 49266
> Signed-off-by: Ankit Nautiyal <[email protected]>
> Signed-off-by: Suraj Kandpal <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_display_wa.c | 9 +++++++++
> drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
>  2 files changed, 10 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c
> b/drivers/gpu/drm/i915/display/intel_display_wa.c
> index 888676693f5e..7456194216be 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
> @@ -111,6 +111,15 @@ bool __intel_display_wa(struct intel_display
> *display, enum intel_display_wa wa,
>               return DISPLAY_VERx100(display) == 3000 ||
>                       DISPLAY_VERx100(display) == 2000 ||
>                       DISPLAY_VERx100(display) == 1401;
> +     /*
> +      * Wa_14021768792:
> +      * Fixes: Limitation of Link M/N ratio > 10 for specific Xe2HPD
> platforms.
> +      * Workaround: Use HDMI_EMP_DATA, CHICKEN_BITs and extended
> bits in LINK_N
> +      * registers to support LINK M/N ratios from > 10 but < 15.
> +      */
> +     case INTEL_DISPLAY_WA_14021768792:
> +             return display->platform.battlemage &&
> +                     IS_DISPLAY_STEP(display, STEP_C0, STEP_FOREVER);
>       case INTEL_DISPLAY_WA_14025769978:
>               return DISPLAY_VER(display) == 35;
>       case INTEL_DISPLAY_WA_14026643300:
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h
> b/drivers/gpu/drm/i915/display/intel_display_wa.h
> index 425a300840aa..b8f2f9363498 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
> @@ -33,6 +33,7 @@ enum intel_display_wa {
>       INTEL_DISPLAY_WA_14014143976,
>       INTEL_DISPLAY_WA_14016740474,
>       INTEL_DISPLAY_WA_14020863754,
> +     INTEL_DISPLAY_WA_14021768792,

LGTM
Reviewed-by: Mitul Golani<[email protected]>

>       INTEL_DISPLAY_WA_14025769978,
>       INTEL_DISPLAY_WA_14026643300,
>       INTEL_DISPLAY_WA_15013987218,
> --
> 2.34.1























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