> -----Original Message----- > From: Intel-gfx [mailto:[email protected]] On Behalf > Of [email protected] > Sent: Saturday, June 28, 2014 12:04 AM > To: [email protected] > Subject: [Intel-gfx] [PATCH 32/40] drm/i915: Hack to tie both common lanes > together on chv > > From: Ville Syrjälä <[email protected]> > > It looks like frobbing the cmnreset line on pne PHY disturbs the other > PHY on chv. The result is a black screen. On HDMI it's just a flash of > black, but DP usually falls over and can't get back up. > > As a workaround set up the power domains so that both common lane > wells power up and down together. I also tried leaving the cmnreset > deasserted even the if the power well goes down but that didn't seem > acceptable to the PHY. > > Signed-off-by: Ville Syrjälä <[email protected]>
I think we need to talk to the SoC people to figure out why we need to this. But otherwise it's for me. Reviewed-by: Rafael Barbalho <[email protected]> > --- > drivers/gpu/drm/i915/intel_pm.c | 14 ++++++++++++-- > 1 file changed, 12 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > b/drivers/gpu/drm/i915/intel_pm.c > index 158c3f5..879d14c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -6776,13 +6776,23 @@ static struct i915_power_well chv_power_wells[] > = { > #endif > { > .name = "dpio-common-bc", > - .domains = CHV_DPIO_CMN_BC_POWER_DOMAINS, > + /* > + * XXX: cmnreset for one PHY seems to disturb the other. > + * As a workaround keep both powered on at the same > + * time for now. > + */ > + .domains = CHV_DPIO_CMN_BC_POWER_DOMAINS | > CHV_DPIO_CMN_D_POWER_DOMAINS, > .data = PUNIT_POWER_WELL_DPIO_CMN_BC, > .ops = &chv_dpio_cmn_power_well_ops, > }, > { > .name = "dpio-common-d", > - .domains = CHV_DPIO_CMN_D_POWER_DOMAINS, > + /* > + * XXX: cmnreset for one PHY seems to disturb the other. > + * As a workaround keep both powered on at the same > + * time for now. > + */ > + .domains = CHV_DPIO_CMN_BC_POWER_DOMAINS | > CHV_DPIO_CMN_D_POWER_DOMAINS, > .data = PUNIT_POWER_WELL_DPIO_CMN_D, > .ops = &chv_dpio_cmn_power_well_ops, > }, > -- > 1.8.5.5 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
