The Displayport Link Layer Compliance Testing Specification 1.2 rev 1.1
specifies that
repeated AUX transactions after a failure (no response / invalid response) must
have
a minimum delay of 400us before the resend can occur. Tests 4.2.1.1 and 4.2.1.2
are two
tests that require this specifically.
Signed-off-by: Todd Previte <tprev...@gmail.com>
---
drivers/gpu/drm/i915/intel_dp.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 952dfa3..a7acc61 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -799,9 +799,14 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
DP_AUX_CH_CTL_TIME_OUT_ERROR |
DP_AUX_CH_CTL_RECEIVE_ERROR);
+ /* DP compliance requires 400us delay for errors
+ and timeouts (DP CTS 1.2 Core Rev 1.1, 4.2.1.1
+ & 4.2.1.2) */
if (status & (DP_AUX_CH_CTL_TIME_OUT_ERROR |
- DP_AUX_CH_CTL_RECEIVE_ERROR))
+ DP_AUX_CH_CTL_RECEIVE_ERROR)) {
+ udelay(400);
continue;
+ }
if (status & DP_AUX_CH_CTL_DONE)
break;
}
--
1.9.1
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