On Thu, Feb 26, 2015 at 02:19:51PM +0000, Kahola, Mika wrote: > > -----Original Message----- > > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] > > Sent: Thursday, February 26, 2015 12:51 PM > > To: Kahola, Mika > > Cc: intel-gfx@lists.freedesktop.org > > Subject: Re: [Intel-gfx] [PATCH] drm/i915: DP link training optimization > > > > On Thu, Feb 26, 2015 at 11:26:10AM +0200, Mika Kahola wrote: > > > In a case when DP link has been once trained we can reuse the existing > > > link training parameters i.e. voltage swing and pre-emphasis levels > > > from cache when there is a need to restart link training. In a case of > > > eDP we initially try to train the link by using the parameter set that > > > we can find from VBT. The fallback on both cases is to reset the link > > > training parameters and restart. > > > > I don't think the fallback from bad VBT values works as on failure they just > > get reset. Care to enlighten me? > > -Chris > > > > -- > > Chris Wilson, Intel Open Source Technology Centre > > Thank you for the comment! This was my first patch to gfx development so all > comments are welcomed. > > The idea that I had in mind was to initially start DP link training with the > parameters that are stored in VBT. If we are unlucky and the link cannot be > established at once by applying those initial parameters the parameters are > reset to zero and link training is restarted. I do agree that the fallback in > this case is unnecessary if VBT values are reset to zero in case of a failure.
The VBT values themselves are not reset to zero. What I meant was the sequence for VBT recovery is: first time link training -> intel_dp_reset_link_train() -> use VBT values -> reuse_train_set = true clock recovery !ok -> reuse_train_set == true -> intel_dp_reset_link_train -> use VBT values again -> reuse_train_set = false i.e. every time we call reset_link_train we restore the VBT values and not zero. What you want is something like a intel_dp->edp_use_vbt_train_set flag that is initially set to is_edp(intel_edp) and then cleared if clock recovery ever fails. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx