On 05/05/2015 07:17 AM, [email protected] wrote:
> From: Ville Syrjälä <[email protected]>
> 
> IBX can have problems with the first write to the port register getting
> masked when enabling the port. We are trying to apply the workaround
> also when disabling the port where it's not needed, and we also try
> to apply it for CPT/PPT as well which don't need it. Just kill it.
> 
> Signed-off-by: Ville Syrjälä <[email protected]>
> ---
>  drivers/gpu/drm/i915/intel_hdmi.c | 8 --------
>  1 file changed, 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
> b/drivers/gpu/drm/i915/intel_hdmi.c
> index 72fce34..308015e 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -1132,14 +1132,6 @@ static void intel_disable_hdmi(struct intel_encoder 
> *encoder)
>       I915_WRITE(intel_hdmi->hdmi_reg, temp);
>       POSTING_READ(intel_hdmi->hdmi_reg);
>  
> -     /* HW workaround, need to write this twice for issue that may result
> -      * in first write getting masked.
> -      */
> -     if (HAS_PCH_SPLIT(dev)) {
> -             I915_WRITE(intel_hdmi->hdmi_reg, temp);
> -             POSTING_READ(intel_hdmi->hdmi_reg);
> -     }
> -
>       if (IS_CHERRYVIEW(dev))
>               chv_powergate_phy_lanes(encoder, 0xf);
>  
> 

Reviewed-by: Jesse Barnes <[email protected]>
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to