On 05/05/2015 07:17 AM, [email protected] wrote: > From: Ville Syrjälä <[email protected]> > > Define a TRANS_DP_PIPE_TO_PORT() to make the CPT DP .get_hw_state() > pipe readout neater. > > Signed-off-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_dp.c | 26 +++++--------------------- > 2 files changed, 6 insertions(+), 21 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index dcd93b5..0538b24 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -6410,6 +6410,7 @@ enum skl_disp_power_wells { > #define TRANS_DP_PORT_SEL_D (2<<29) > #define TRANS_DP_PORT_SEL_NONE (3<<29) > #define TRANS_DP_PORT_SEL_MASK (3<<29) > +#define TRANS_DP_PIPE_TO_PORT(val) ((((val) & TRANS_DP_PORT_SEL_MASK) >> > 29) + PORT_B) > #define TRANS_DP_AUDIO_ONLY (1<<26) > #define TRANS_DP_ENH_FRAMING (1<<18) > #define TRANS_DP_8BPC (0<<9) > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 0971a5d..dc89931 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -2177,28 +2177,12 @@ static bool intel_dp_get_hw_state(struct > intel_encoder *encoder, > if (IS_GEN7(dev) && port == PORT_A) { > *pipe = PORT_TO_PIPE_CPT(tmp); > } else if (HAS_PCH_CPT(dev) && port != PORT_A) { > - u32 trans_sel; > - u32 trans_dp; > - int i; > - > - switch (intel_dp->output_reg) { > - case PCH_DP_B: > - trans_sel = TRANS_DP_PORT_SEL_B; > - break; > - case PCH_DP_C: > - trans_sel = TRANS_DP_PORT_SEL_C; > - break; > - case PCH_DP_D: > - trans_sel = TRANS_DP_PORT_SEL_D; > - break; > - default: > - return true; > - } > + enum pipe p; > > - for_each_pipe(dev_priv, i) { > - trans_dp = I915_READ(TRANS_DP_CTL(i)); > - if ((trans_dp & TRANS_DP_PORT_SEL_MASK) == trans_sel) { > - *pipe = i; > + for_each_pipe(dev_priv, p) { > + u32 trans_dp = I915_READ(TRANS_DP_CTL(p)); > + if (TRANS_DP_PIPE_TO_PORT(trans_dp) == port) { > + *pipe = p; > return true; > } > } >
Nice. Reviewed-by: Jesse Barnes <[email protected]> _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
