On Wed, Nov 04, 2015 at 07:24:17PM +0200, Imre Deak wrote: > We need to disable the DC states during display core init to sanitize > the HW state we inherit from the BIOS. We need to disable it during > display core uninit too, since the power well framework will leave it > enabled (since we get to the display core uninit step with all power > domains disabled already). > > Signed-off-by: Imre Deak <[email protected]>
Reviewed-by: Patrik Jakobsson <[email protected]> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > b/drivers/gpu/drm/i915/intel_runtime_pm.c > index f5fb003..3d500e1d 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -1900,6 +1900,8 @@ static void skl_display_core_init(struct > drm_i915_private *dev_priv, > struct i915_power_domains *power_domains = &dev_priv->power_domains; > uint32_t val; > > + gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); > + > /* enable PCH reset handshake */ > val = I915_READ(HSW_NDE_RSTWRN_OPT); > I915_WRITE(HSW_NDE_RSTWRN_OPT, val | RESET_PCH_HANDSHAKE_ENABLE); > @@ -1921,6 +1923,8 @@ static void skl_display_core_uninit(struct > drm_i915_private *dev_priv) > { > struct i915_power_domains *power_domains = &dev_priv->power_domains; > > + gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); > + > skl_uninit_cdclk(dev_priv); > > /* The spec doesn't call for removing the reset handshake flag */ > -- > 2.1.4 > _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
