On Tue, May 17, 2016 at 04:19:06AM -0400, Zhi Wang wrote: > Previously the addressing mode bit in context descriptor is generated from > context PPGTT. As we allow context could be used without PPGTT, and we > still need to know the addressing mode during context submission, a flag > is introduced. > > And the addressing mode bit will be generated from this flag. > > v5: > > - Change USES_FULL_48BIT(dev) to USES_FULL_48BIT(dev_priv) (Tvrtko) > > Signed-off-by: Zhi Wang <[email protected]> > --- > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/i915_gem_context.c | 2 ++ > drivers/gpu/drm/i915/intel_lrc.c | 9 +++++---- > 3 files changed, 8 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index cc83f2d..91f69e5 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -884,6 +884,7 @@ struct intel_context { > bool initialised; > } engine[I915_NUM_ENGINES]; > u32 ring_buffer_size; > + bool use_48bit_addressing_mode;
A whole bool? You could put the desc.addressing_mode in there! -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
