Bspec states that this wa is for A0/B0 revs and this is noted in
commit b90420467232 ("drm/i915/kbl: Add WaDisableDynamicCreditSharing")
But other sources state that this is for A0 only. Also evidence indicates
that with some kbl variants the bit doesn't stick. So trust the other
sources and limit the scope for A0 only.References: https://bugs.freedesktop.org/show_bug.cgi?id=96981 Fixes: b90420467232 ("drm/i915/kbl: Add WaDisableDynamicCreditSharing") Cc: [email protected] Cc: Matthew Auld <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> --- drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 09f01c641c14..63316a6ea46c 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -1176,7 +1176,7 @@ static int kbl_init_workarounds(struct intel_engine_cs *engine) GEN9_GAPS_TSV_CREDIT_DISABLE)); /* WaDisableDynamicCreditSharing:kbl */ - if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0)) + if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_A0)) WA_SET_BIT(GAMT_CHKN_BIT_REG, GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING); -- 2.7.4 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
