[Intel-wired-lan] [PATCH iwl-net v1 2/2] e1000e: clear DPG_EN after reset to avoid autonomous power-gating

[Vitaly Lifshits]

Panther Lake systems introduced an autonomous power gating feature for
the integrated Gigabit Ethernet in shutdown state (S5) state. As part of
it, the reset value of DPG_EN bit was changed to 1. Clear this bit after
performing hardware reset to avoid errors such as Tx/Rx hangs, or packet
loss/corruption.

Fixes: 0c9183ce61bc ("e1000e: Add support for the next LOM generation")
Signed-off-by: Vitaly Lifshits <vitaly.lifsh...@intel.com>
---
 drivers/net/ethernet/intel/e1000e/ich8lan.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c 
b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index eead80bba6f4..dbf240c8b483 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -4932,6 +4932,15 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
        reg |= E1000_KABGTXD_BGSQLBIAS;
        ew32(KABGTXD, reg);
 
+       /* The reset value of DPG_EN bit was changed to 1
+       * clear it to avoid unexpected autonomous power-gating
+       */
+       if (hw->mac.type >= e1000_pch_ptp) {
+               reg = er32(CTRL_EXT);
+               reg &= ~E1000_CTRL_EXT;
+               ew32(CTRL_EXT, reg);
+       }
+
        return 0;
 }
 
-- 
2.34.1