On 17-Jun-16 21:12, [email protected] wrote: > From: Antonios Motakis <[email protected]> > > This patch series includes the port of Jailhouse on ARM AArch64. > > This is the main part of a 3 part series: > These apply in succession (preparatory -> main -> inmates series), > on the latest next branch from upstream, and they can also be > pulled from https://github.com/tvelocity/jailhouse.git (branch arm64_v9) >
What I forgot to add in the cover, is that a fix for the TLB behavior on ARMv7/8 (break before make) is not included. Otherwise I think I addressed the rest of the points that came up in the last round. Cheers, Tony > Changes from v8: > - Caught up with the preparatory series... > - Got rid of the virt_id from the per_cpu struct. We don't need it. > We mainly care about the MPIDR and the logical cpu_id used by > Jailhouse; the GIC code also cares about the CPU interface number > as well. None of these really map to the virt_id somehow. > - Etc etc. > > Changes from RFCv7: > - The early bootstrap page tables are now being generated > dynamically, during entry. This change will make it easier > to make Jailhouse a position independent executable in the > future. > - ARMv7 (should be) working again! > - Fixed a few issues during hypervisor disable > - The hypervisor should work on a wider range of PARanges now > - Further small fixes, clean ups, as always > > Changes from RFCv6: > - Probably too many to list here! > - Initial support for MPID affinity levels (as needed by PSCI) > - Working inmates > - Linux inmate support, by Dmitry Voytik! > - Improved /fixed cache coherency handling by Dmitry Voytik > - Support for the 4th level of page tables, allowing for a PARange of 40-48 > - Many fixes that were discovered by running Jailhouse on the AMD Seattle > > Changes from RFCv5: > - PSCI support > - Hypercalls to the hypervisor > - Hypervisor disable, and also return to Linux properly when > initialization fails > - More clean ups, clean ups, fixes > Contributions by Dmitry Voytik: > - Implement cache flushes, maintenance of the memory system > - Refactored a lot of trap handling code and other mmio bits > - Dump cell registers support for AArch64. > > Changes from RFCv4: > - Stubs now use trace_error, or block, to make it more obvious when > we run into a missing stub during development. > - Working root cell! Thanks to working MMU mappings, and working > GICv2 handling. > - MMU mappings are being set up for the hypervisor (EL2), and for > the root cell (Stage 2 EL1). > - Reworked the JAILHOUSE_IOMAP_ADDR decoupling from JAILHOUSE_BASE > - Clean ups, clean ups, fixes > > Antonios Motakis (22): > arm64: add sysregs helper macros > arm64: add asm/processor.h header for AArch64 > arm64: add definitions for the AArch64 page table format > arm64: spinlock implementation > arm64: add percpu.h header file > arm64: add cell.h header file > arm64: add jailhouse_hypercall.h header file > arm64: minimum stubs to allow building on AArch64 > config: add root cell configuration for the ARMv8 Foundation model > config: root cell configuration for the AMD Seattle > arm64: implement data cache flush > arm64: initialize EL2 for hypervisor entry > arm64: initialize the hypervisor for entry > arm64: initial exception handling and catch EL2 aborts > arm64: plug the hypervisor mmu code > arm64: handle accesses to emulated mmio regions > arm64: plug the irqchip and GICv2 code from AArch32 > arm64: PSCI support for SMP on AArch64 > arm64: reanimate the root cell back from the dead > arm64: hande hypercalls from the cells > arm64: hypervisor disable support > arm64: implement cell control infrastructure > > Claudio Fontana (1): > arm64: implement bitops > > Dmitry Voytik (4): > arm64: add control.h header file > arm64: add types.h > arm64: dump stack on unhandled exceptions > tools: arm64: add exception dump parser > > Jan Kiszka (1): > ci: Add support for arm64 > > .travis.yml | 2 +- > ci/build-all-configs.sh | 6 +- > ci/gen-kernel-build.sh | 1 + > ci/jailhouse-config-amd-seattle.h | 5 + > ci/kernel-config-amd-seattle | 3091 > ++++++++++++++++++++ > configs/amd-seattle.c | 169 ++ > configs/foundation-v8.c | 120 + > hypervisor/Makefile | 4 + > hypervisor/arch/arm/include/asm/psci.h | 3 +- > hypervisor/arch/arm/include/asm/uart_pl011.h | 2 + > hypervisor/arch/arm/psci.c | 4 +- > hypervisor/arch/arm64/Makefile | 26 + > hypervisor/arch/arm64/asm-defines.c | 19 + > hypervisor/arch/arm64/caches.S | 48 + > hypervisor/arch/arm64/control.c | 321 ++ > hypervisor/arch/arm64/entry.S | 330 +++ > hypervisor/arch/arm64/exception.S | 96 + > hypervisor/arch/arm64/include/asm/bitops.h | 141 + > hypervisor/arch/arm64/include/asm/cell.h | 36 + > hypervisor/arch/arm64/include/asm/control.h | 43 + > hypervisor/arch/arm64/include/asm/head.h | 16 + > .../arch/arm64/include/asm/jailhouse_hypercall.h | 91 + > hypervisor/arch/arm64/include/asm/paging.h | 245 ++ > hypervisor/arch/arm64/include/asm/percpu.h | 123 + > hypervisor/arch/arm64/include/asm/platform.h | 69 + > hypervisor/arch/arm64/include/asm/processor.h | 191 ++ > hypervisor/arch/arm64/include/asm/sections.h | 29 + > hypervisor/arch/arm64/include/asm/setup.h | 29 + > hypervisor/arch/arm64/include/asm/spinlock.h | 71 + > hypervisor/arch/arm64/include/asm/sysregs.h | 26 + > hypervisor/arch/arm64/include/asm/traps.h | 37 + > hypervisor/arch/arm64/include/asm/types.h | 46 + > hypervisor/arch/arm64/mmio.c | 109 + > hypervisor/arch/arm64/psci_low.S | 65 + > hypervisor/arch/arm64/setup.c | 126 + > hypervisor/arch/arm64/traps.c | 204 ++ > hypervisor/include/jailhouse/control.h | 6 + > inmates/demos/arm64/Makefile | 0 > inmates/lib/arm64/Makefile | 0 > inmates/tools/arm64/Makefile | 0 > scripts/arm64-parsedump.py | 167 ++ > 41 files changed, 6113 insertions(+), 4 deletions(-) > create mode 100644 ci/jailhouse-config-amd-seattle.h > create mode 100644 ci/kernel-config-amd-seattle > create mode 100644 configs/amd-seattle.c > create mode 100644 configs/foundation-v8.c > create mode 100644 hypervisor/arch/arm64/Makefile > create mode 100644 hypervisor/arch/arm64/asm-defines.c > create mode 100644 hypervisor/arch/arm64/caches.S > create mode 100644 hypervisor/arch/arm64/control.c > create mode 100644 hypervisor/arch/arm64/entry.S > create mode 100644 hypervisor/arch/arm64/exception.S > create mode 100644 hypervisor/arch/arm64/include/asm/bitops.h > create mode 100644 hypervisor/arch/arm64/include/asm/cell.h > create mode 100644 hypervisor/arch/arm64/include/asm/control.h > create mode 100644 hypervisor/arch/arm64/include/asm/head.h > create mode 100644 hypervisor/arch/arm64/include/asm/jailhouse_hypercall.h > create mode 100644 hypervisor/arch/arm64/include/asm/paging.h > create mode 100644 hypervisor/arch/arm64/include/asm/percpu.h > create mode 100644 hypervisor/arch/arm64/include/asm/platform.h > create mode 100644 hypervisor/arch/arm64/include/asm/processor.h > create mode 100644 hypervisor/arch/arm64/include/asm/sections.h > create mode 100644 hypervisor/arch/arm64/include/asm/setup.h > create mode 100644 hypervisor/arch/arm64/include/asm/spinlock.h > create mode 100644 hypervisor/arch/arm64/include/asm/sysregs.h > create mode 100644 hypervisor/arch/arm64/include/asm/traps.h > create mode 100644 hypervisor/arch/arm64/include/asm/types.h > create mode 100644 hypervisor/arch/arm64/mmio.c > create mode 100644 hypervisor/arch/arm64/psci_low.S > create mode 100644 hypervisor/arch/arm64/setup.c > create mode 100644 hypervisor/arch/arm64/traps.c > create mode 100644 inmates/demos/arm64/Makefile > create mode 100644 inmates/lib/arm64/Makefile > create mode 100644 inmates/tools/arm64/Makefile > create mode 100755 scripts/arm64-parsedump.py > -- Antonios Motakis Virtualization Engineer Huawei Technologies Duesseldorf GmbH European Research Center Riesstrasse 25, 80992 München -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
