From: Antonios Motakis <[email protected]> Add under config/foundation-v8.c a root cell configuration for the ARMv8 Foundation model, so we can in use this target with Jailhouse. We also add the neccessary parameters in asm/platform.h for this model.
Signed-off-by: Antonios Motakis <[email protected]> --- configs/foundation-v8.c | 120 +++++++++++++++++++++++++++ hypervisor/arch/arm64/include/asm/platform.h | 32 +++++++ 2 files changed, 152 insertions(+) create mode 100644 configs/foundation-v8.c diff --git a/configs/foundation-v8.c b/configs/foundation-v8.c new file mode 100644 index 0000000..d301365 --- /dev/null +++ b/configs/foundation-v8.c @@ -0,0 +1,120 @@ +/* + * Jailhouse AArch64 support + * + * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH + * + * Authors: + * Antonios Motakis <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <linux/types.h> +#include <jailhouse/cell-config.h> + +#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0])) + +struct { + struct jailhouse_system header; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[9]; + struct jailhouse_irqchip irqchips[1]; +} __attribute__((packed)) config = { + .header = { + .signature = JAILHOUSE_SYSTEM_SIGNATURE, + .hypervisor_memory = { + .phys_start = 0xfc000000, + .size = 0x4000000, + }, + .debug_console = { + .phys_start = 0x1c090000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_IO, + }, + .root_cell = { + .name = "foundation-v8", + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = 1, + }, + }, + + .cpus = { + 0xf, + }, + + .mem_regions = { + /* ethernet */ { + .phys_start = 0x1a000000, + .virt_start = 0x1a000000, + .size = 0x00010000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* sysreg */ { + .phys_start = 0x1c010000, + .virt_start = 0x1c010000, + .size = 0x00001000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* uart0 */ { + .phys_start = 0x1c090000, + .virt_start = 0x1c090000, + .size = 0x00001000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* uart1 */ { + .phys_start = 0x1c0a0000, + .virt_start = 0x1c0a0000, + .size = 0x00001000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* uart2 */ { + .phys_start = 0x1c0b0000, + .virt_start = 0x1c0b0000, + .size = 0x00001000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* uart3 */ { + .phys_start = 0x1c0c0000, + .virt_start = 0x1c0c0000, + .size = 0x00001000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* virtio_block */ { + .phys_start = 0x1c130000, + .virt_start = 0x1c130000, + .size = 0x00001000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* RAM */ { + .phys_start = 0x80000000, + .virt_start = 0x80000000, + .size = 0x7c000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE, + }, + /* RAM */ { + .phys_start = 0x880000000, + .virt_start = 0x880000000, + .size = 0x80000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE, + }, + }, + .irqchips = { + /* GIC */ { + .address = 0x2c001000, + .pin_bitmap = 0xffffffffffffffff, + }, + }, + +}; diff --git a/hypervisor/arch/arm64/include/asm/platform.h b/hypervisor/arch/arm64/include/asm/platform.h index afd7e72..f8d4d91 100644 --- a/hypervisor/arch/arm64/include/asm/platform.h +++ b/hypervisor/arch/arm64/include/asm/platform.h @@ -15,4 +15,36 @@ #include <jailhouse/config.h> +#ifdef CONFIG_MACH_FOUNDATION_V8 + +# ifdef CONFIG_ARM_GIC_V3 +# define GICD_BASE ((void *)0x2f000000) +# define GICD_SIZE 0x10000 +# define GICR_BASE ((void *)0x2f100000) +# define GICR_SIZE 0x100000 + +# include <asm/gic_v3.h> +# else /* GICv2 */ +# define GICD_BASE ((void *)0x2c001000) +# define GICD_SIZE 0x1000 +# define GICC_BASE ((void *)0x2c002000) +/* + * WARN: most device trees are broken and report only one page for the GICC. + * It will brake the handle_irq code, since the GICC_DIR register is located at + * offset 0x1000... + */ +# define GICC_SIZE 0x2000 +# define GICH_BASE ((void *)0x2c004000) +# define GICH_SIZE 0x2000 +# define GICV_BASE ((void *)0x2c006000) +# define GICV_SIZE 0x2000 + +# include <asm/gic_v2.h> +# endif /* GIC */ + +# define MAINTENANCE_IRQ 25 +# define UART_BASE 0x1c090000 + +#endif /* CONFIG_MACH_FOUNDATION_V8 */ + #endif /* !_JAILHOUSE_ASM_PLATFORM_H */ -- 2.8.0.rc3 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
