All d-cache entries related to memory that a cell will use after reset
or that a destructed cell was using are irrelevant now. Invalidate them
so that nothing leaks from/to other cells or previous sessions of the
same cell.
CC: Marc Zyngier <marc.zyng...@arm.com>
CC: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
---
hypervisor/arch/arm/control.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hypervisor/arch/arm/control.c b/hypervisor/arch/arm/control.c
index 4c5b63a..8b34fcf 100644
--- a/hypervisor/arch/arm/control.c
+++ b/hypervisor/arch/arm/control.c
@@ -352,6 +352,8 @@ void arch_cell_destroy(struct cell *cell)
unsigned int cpu;
struct per_cpu *percpu;
+ arm_cell_dcaches_flush(cell, DCACHE_INVALIDATE);
+
for_each_cpu(cpu, cell->cpu_set) {
percpu = per_cpu(cpu);
/* Re-assign the physical IDs for the root cell */
@@ -366,6 +368,7 @@ void arch_cell_destroy(struct cell *cell)
void arch_cell_reset(struct cell *cell)
{
+ arm_cell_dcaches_flush(cell, DCACHE_INVALIDATE);
}
/* Note: only supports synchronous flushing as triggered by config_commit! */
--
Siemens AG, Corporate Technology, CT RDA ITP SES-DE
Corporate Competence Center Embedded Linux
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