Despite claiming to perform also a dcache invalidation,
arch_paging_flush_cpu_caches was only doing a clean so far, probably due
to a mistake in the definition of DCCIMVAC (it was defined as DCCMVAC).
However, there is no need to invalidate the caches here. Therefore align
the sysreg definition and comments to what the code already did.
CC: Marc Zyngier <marc.zyng...@arm.com>
CC: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
---
hypervisor/arch/arm/include/asm/paging.h | 4 ++--
hypervisor/arch/arm/include/asm/sysregs.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hypervisor/arch/arm/include/asm/paging.h
b/hypervisor/arch/arm/include/asm/paging.h
index a367e2c..4c2edba 100644
--- a/hypervisor/arch/arm/include/asm/paging.h
+++ b/hypervisor/arch/arm/include/asm/paging.h
@@ -207,8 +207,8 @@ static inline void arch_paging_flush_page_tlbs(unsigned
long page_addr)
static inline void arch_paging_flush_cpu_caches(void *addr, long size)
{
do {
- /* Clean & invalidate by MVA to PoC */
- arm_write_sysreg(DCCIMVAC, addr);
+ /* Clean by MVA to PoC */
+ arm_write_sysreg(DCCMVAC, addr);
size -= cache_line_size;
addr += cache_line_size;
} while (size > 0);
diff --git a/hypervisor/arch/arm/include/asm/sysregs.h
b/hypervisor/arch/arm/include/asm/sysregs.h
index 3011364..c19248e 100644
--- a/hypervisor/arch/arm/include/asm/sysregs.h
+++ b/hypervisor/arch/arm/include/asm/sysregs.h
@@ -103,7 +103,7 @@
#define ICIALLUIS SYSREG_32(0, c7, c1, 0)
#define ICIALLU SYSREG_32(0, c7, c5, 0)
-#define DCCIMVAC SYSREG_32(0, c7, c10, 1)
+#define DCCMVAC SYSREG_32(0, c7, c10, 1)
#define DCCSW SYSREG_32(0, c7, c10, 2)
#define DCCISW SYSREG_32(0, c7, c14, 2)
--
2.1.4
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