The function actually violates the previous comment - the caller flushes
the cache properly to enable this.

Signed-off-by: Jan Kiszka <[email protected]>
---
 hypervisor/arch/arm64/entry.S | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hypervisor/arch/arm64/entry.S b/hypervisor/arch/arm64/entry.S
index ab29f39..70f8658 100644
--- a/hypervisor/arch/arm64/entry.S
+++ b/hypervisor/arch/arm64/entry.S
@@ -127,9 +127,9 @@ arch_shutdown_mmu:
        /* x0: struct percpu* */
        mov     x19, x0
 
-       /* Note: no memory accesses must be done after turning MMU off. There
-        * is non-zero probability that cached data can be not syncronized with
-        * system memory. CPU can access data bypassing D-cache when MMU is off.
+       /*
+        * Note: no data accesses must be done after turning MMU off unless the
+        * target region has been flushed out of D-cache.
         */
 
        /* hand over control of EL2 back to Linux */
-- 
2.1.4

-- 
You received this message because you are subscribed to the Google Groups 
"Jailhouse" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to [email protected].
For more options, visit https://groups.google.com/d/optout.

Reply via email to