Use length defined by PCI specification for AER (Advanced Error
Reporting) capability. This is relevant if PCI device is assigned for an
inmate cell and this capability is accessed.
Capability is set as RW, because there are relevant fields that are
read-write.
---
tools/jailhouse-config-create | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/tools/jailhouse-config-create b/tools/jailhouse-config-create
index ce2affc..7fd37ab 100755
--- a/tools/jailhouse-config-create
+++ b/tools/jailhouse-config-create
@@ -226,6 +226,7 @@ class PCICapability:
def parse_pcicaps(dir):
caps = []
has_extended_caps = False
+ tlp_prefix_supported = False
f = input_open(os.path.join(dir, 'config'), 'rb')
f.seek(0x06)
(status,) = struct.unpack('<H', f.read(2))
@@ -259,6 +260,11 @@ class PCICapability:
(cap_reg,) = struct.unpack('<H', f.read(2))
if (cap_reg & 0xf) >= 2: # v2 capability
len = 60
+ f.seek(cap + 0x24)
+ (dev_cap2,) = struct.unpack('<xB', f.read(2))
+ if dev_cap2 & 0x20 != 0:
+ tlp_prefix_supported = True
+
# access side effects still need to be analyzed
flags = PCICapability.RD
has_extended_caps = True
@@ -297,6 +303,12 @@ class PCICapability:
len = 64
# access side effects still need to be analyzed
flags = PCICapability.RD
+ elif id == 0x0001: # AER
+ if tlp_prefix_supported:
+ len = 0x48
+ else:
+ len = 0x38
+ flags = PCICapability.RW
else:
if (id & PCICapability.JAILHOUSE_PCI_EXT_CAP) != 0:
print('WARNING: Ignoring unsupported PCI Express '
--
2.14.1
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