Hi Greeting to all. I'm experimenting jailhouse on QEMU setup in X86 platform.I'm running the kernel 4.15-rc4 downloaded from jailhouse repo with QEMU (v2.11.5) configuration.I insert the jailhouse module on QEMU setup. And created the non-root cell with same 4.15-rc4 kernel.It is working fine. And i try to load vanilla 4.9 kernel on non-root cell with QEMU configuration.I'm not seen any kernel logs on the serial console and not getting any error also. Here i included both root and non root cell config and Jailhouse log also.
Do we need to change any jailhouse configuration? or Do we need to add any patches?. Regards, Arun -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
/* * Jailhouse, a Linux-based partitioning hypervisor * * Configuration for linux inmate, 1 CPU, ~60 MB RAM, 1 serial port * * Copyright (c) Siemens AG, 2013-2015 * * Authors: * Jan Kiszka <[email protected]> * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. */ #include <jailhouse/types.h> #include <jailhouse/cell-config.h> #define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0]) struct { struct jailhouse_cell_desc cell; __u64 cpus[1]; #ifdef CONFIG_QEMU_E1000E_ASSIGNMENT struct jailhouse_memory mem_regions[8]; #else struct jailhouse_memory mem_regions[4]; #endif struct jailhouse_cache cache_regions[1]; struct jailhouse_irqchip irqchips[1]; __u8 pio_bitmap[0x2000]; #ifdef CONFIG_QEMU_E1000E_ASSIGNMENT struct jailhouse_pci_device pci_devices[2]; #else struct jailhouse_pci_device pci_devices[1]; #endif struct jailhouse_pci_capability pci_caps[6]; } __attribute__((packed)) config = { .cell = { .signature = JAILHOUSE_CELL_DESC_SIGNATURE, .revision = JAILHOUSE_CONFIG_REVISION, .name = "linux-x86-demo", .flags = JAILHOUSE_CELL_PASSIVE_COMMREG | JAILHOUSE_CELL_DEBUG_CONSOLE, .cpu_set_size = sizeof(config.cpus), .num_memory_regions = ARRAY_SIZE(config.mem_regions), .num_cache_regions = ARRAY_SIZE(config.cache_regions), .num_irqchips = ARRAY_SIZE(config.irqchips), .pio_bitmap_size = ARRAY_SIZE(config.pio_bitmap), .num_pci_devices = ARRAY_SIZE(config.pci_devices), .num_pci_caps = ARRAY_SIZE(config.pci_caps), }, .cpus = { 0xe, }, .mem_regions = { /* low RAM */ { .phys_start = /*0x3b600000*/0x3f000000, .virt_start = 0, .size = 0x00100000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA | JAILHOUSE_MEM_LOADABLE, }, /* communication region */ { .virt_start = 0x00100000, .size = 0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_COMM_REGION, }, /* high RAM */ { .phys_start = /*0x3b700000*/0x3f100000, .virt_start = 0x00200000, .size = 0x1bf00000/*0x3a00000*/, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA | JAILHOUSE_MEM_LOADABLE, }, #if 0 /* IVSHMEM shared memory region */ { .phys_start = 0x3f100000, .virt_start = 0x3f100000, .size = 0xff000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED, }, #endif #ifdef CONFIG_QEMU_E1000E_ASSIGNMENT /* MemRegion: feb40000-feb7ffff : 0000:00:02.0 */ { .phys_start = 0xfeb40000, .virt_start = 0xfeb40000, .size = 0x40000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, }, /* MemRegion: feb80000-feb9ffff : e1000e */ { .phys_start = 0xfeb80000, .virt_start = 0xfeb80000, .size = 0x20000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, }, /* MemRegion: feba0000-febbffff : e1000e */ { .phys_start = 0xfeba0000, .virt_start = 0xfeba0000, .size = 0x20000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, }, /* MemRegion: febd1000-febd3fff : e1000e */ { .phys_start = 0xfebd1000, .virt_start = 0xfebd1000, .size = 0x3000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, }, #endif }, .cache_regions = { { .start = 0, .size = 2, .type = JAILHOUSE_CACHE_L3, }, }, .irqchips = { /* IOAPIC */ { .address = 0xfec00000, .id = 0xff00, .pin_bitmap = { (1 << 3) | (1 << 4), }, }, }, .pio_bitmap = { [ 0/8 ... 0x28/8] = -1, [ 0x29/8 ... 0x2f/8] = 0,/*added*/ [ 0x30/8 ... 0x48/8] = -1, [ 0x49/8 ... 0x4f/8] = 0,/*added*/ [ 0x50/8 ... 0x6f/8] = -1, [ 0x70/8 ... 0x77/8] = 0xfc, [ 0x78/8 ... 0x2e7/8] = -1, [ 0x2e8/8 ... 0x2ef/8] = 0,/*added*/ [ 0x2f0/8 ... 0x2f7/8] = -1, [ 0x2f8/8 ... 0x2ff/8] = 0, /* serial2 */ [ 0x300/8 ... 0x3e7/8] = -1, [ 0x3e8/8 ... 0x3ef/8] = 0,/*added*/ [ 0x3f0/8 ... 0x3f7/8] = -1, [ 0x3f8/8 ... 0x3ff/8] = 0, /* serial1 */ [ 0x400/8 ... 0xe00f/8] = -1, [0xe010/8 ... 0xe017/8] = 0, /* OXPCIe952 serial1 */ [0xe018/8 ... 0xffff/8] = -1, }, .pci_devices = { { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .domain = 0x0, .bdf = 0x0e << 3, .bar_mask = { 0xffffff00, 0xffffffff, 0x00000000, 0x00000000, 0xffffffe0, 0xffffffff, }, .num_msix_vectors = 1, .shmem_region = 3, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, }, #ifdef CONFIG_QEMU_E1000E_ASSIGNMENT { /* e1000e */ .type = JAILHOUSE_PCI_TYPE_DEVICE, .domain = 0x0000, .bdf = 0x0010, .bar_mask = { 0xfffe0000, 0xfffe0000, 0xffffffe0, 0xffffc000, 0x00000000, 0x00000000, }, .caps_start = 0, .num_caps = 6, .num_msi_vectors = 1, .msi_64bits = 1, .num_msix_vectors = 5, .msix_region_size = 0x1000, .msix_address = 0xfebd0000, }, #endif }, .pci_caps = { { /* e1000e */ .id = 0x1, .start = 0xc8, .len = 8, .flags = JAILHOUSE_PCICAPS_WRITE, }, { .id = 0x5, .start = 0xd0, .len = 14, .flags = JAILHOUSE_PCICAPS_WRITE, }, { .id = 0x10, .start = 0xe0, .len = 20, .flags = JAILHOUSE_PCICAPS_WRITE, }, { .id = 0x11, .start = 0xa0, .len = 12, .flags = JAILHOUSE_PCICAPS_WRITE, }, { .id = 0x1 | JAILHOUSE_PCI_EXT_CAP, .start = 0x100, .len = 4, .flags = 0, }, { .id = 0x3 | JAILHOUSE_PCI_EXT_CAP, .start = 0x140, .len = 4, .flags = 0, }, } };
/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Copyright (c) Siemens AG, 2014-2017
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*
* Alternatively, you can use or redistribute this file under the following
* BSD license:
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* Configuration for QEMU Standard PC (Q35 + ICH9, 2009)
* created with '/usr/local/libexec/jailhouse/jailhouse config create --mem-inmates 448M friday.c'
*
* NOTE: This config expects the following to be appended to your kernel cmdline
* "memmap=0x20000000$0x3b000000"
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[25];
struct jailhouse_irqchip irqchips[1];
__u8 pio_bitmap[0x2000];
struct jailhouse_pci_device pci_devices[7];
struct jailhouse_pci_capability pci_caps[3];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.hypervisor_memory = {
.phys_start = 0x3b000000,
.size = 0x4000000,
},
.debug_console = {
.address = 0x3f8,
.flags = JAILHOUSE_CON1_TYPE_8250 |
JAILHOUSE_CON1_ACCESS_PIO |
JAILHOUSE_CON1_REGDIST_1 |
JAILHOUSE_CON2_TYPE_ROOTPAGE,
},
.platform_info = {
.pci_mmconfig_base = 0xb0000000,
.pci_mmconfig_end_bus = 0xff,
.x86 = {
.pm_timer_address = 0x608,
.vtd_interrupt_limit = 128,
.iommu_units = {
{
.base = 0xfed90000,
.size = 0x1000,
},
},
},
},
.root_cell = {
.name = "RootCell",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.pio_bitmap_size = ARRAY_SIZE(config.pio_bitmap),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.num_pci_caps = ARRAY_SIZE(config.pci_caps),
},
},
.cpus = {
0x000000000000000f,
},
.mem_regions = {
/* MemRegion: 00000000-00000fff : Reserved */
{
.phys_start = 0x0,
.virt_start = 0x0,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 00001000-0009fbff : System RAM */
{
.phys_start = 0x1000,
.virt_start = 0x1000,
.size = 0x9f000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 0009fc00-0009ffff : Reserved */
{
.phys_start = 0x9fc00,
.virt_start = 0x9fc00,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 000a0000-000bffff : PCI Bus 0000:00 */
{
.phys_start = 0xa0000,
.virt_start = 0xa0000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 000f0000-000fffff : System ROM */
{
.phys_start = 0xf0000,
.virt_start = 0xf0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 00100000-3affffff : System RAM */
{
.phys_start = 0x100000,
.virt_start = 0x100000,
.size = 0x3af00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 3b000000-5affffff : Reserved */
{
.phys_start = 0x3b000000,
.virt_start = 0x3b000000,
.size = 0x20000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 5b000000-7ffdefff : System RAM */
{
.phys_start = 0x5b000000,
.virt_start = 0x5b000000,
.size = 0x24fdf000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 7ffdf000-7fffffff : Reserved */
{
.phys_start = 0x7ffdf000,
.virt_start = 0x7ffdf000,
.size = 0x21000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd000000-fdffffff : 0000:00:01.0 */
{
.phys_start = 0xfd000000,
.virt_start = 0xfd000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: feb80000-febbffff : 0000:00:02.0 */
{
.phys_start = 0xfeb80000,
.virt_start = 0xfeb80000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: febc0000-febdffff : e1000 */
{
.phys_start = 0xfebc0000,
.virt_start = 0xfebc0000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: febf0000-febf3fff : ICH HD audio */
{
.phys_start = 0xfebf0000,
.virt_start = 0xfebf0000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: febf4000-febf4fff : 0000:00:01.0 */
{
.phys_start = 0xfebf4000,
.virt_start = 0xfebf4000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: febf5000-febf5fff : ahci */
{
.phys_start = 0xfebf5000,
.virt_start = 0xfebf5000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed00000-fed003ff : PNP0103:00 */
{
.phys_start = 0xfed00000,
.virt_start = 0xfed00000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed1f410-fed1f414 : iTCO_wdt.0.auto */
{
.phys_start = 0xfed1f410,
.virt_start = 0xfed1f410,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: feffc000-feffffff : Reserved */
{
.phys_start = 0xfeffc000,
.virt_start = 0xfeffc000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fffc0000-ffffffff : Reserved */
{
.phys_start = 0xfffc0000,
.virt_start = 0xfffc0000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 100000000-112dfffff : System RAM */
{
.phys_start = 0x100000000,
.virt_start = 0x100000000,
.size = 0x12e00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 112e00000-114ffffff : Kernel */
{
.phys_start = 0x112e00000,
.virt_start = 0x112e00000,
.size = 0x2200000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 115000000-13fffffff : System RAM */
{
.phys_start = 0x115000000,
.virt_start = 0x115000000,
.size = 0x2b000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 140000000-93fffffff : PCI Bus 0000:00 */
{
.phys_start = 0x140000000,
.virt_start = 0x140000000,
.size = 0x800000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 000c0000-000dffff : ROMs */
{
.phys_start = 0xc0000,
.virt_start = 0xc0000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 3f000000-5affffff : JAILHOUSE Inmate Memory */
{
.phys_start = 0x3f000000,
.virt_start = 0x3f000000,
.size = 0x1c000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
},
.irqchips = {
/* IOAPIC 0, GSI base 0 */
{
.address = 0xfec00000,
.id = 0xff00,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
},
//#if 0
.pio_bitmap = {
[ 0/8 ... 0x3f/8] = -1,
[ 0x40/8 ... 0x47/8] = 0xf0, /* PIT */
[ 0x48/8 ... 0x5f/8] = -1,
[ 0x60/8 ... 0x67/8] = 0xec, /* HACK: NMI status/control */
[ 0x68/8 ... 0x6f/8] = -1,
[ 0x70/8 ... 0x77/8] = 0xfc, /* RTC */
[ 0x78/8 ... 0x3af/8] = -1,
[ 0x3b0/8 ... 0x3df/8] = 0x00, /* VGA */
[ 0x3e0/8 ... 0xcff/8] = -1,
[ 0xd00/8 ... 0xffff/8] = 0, /* HACK: PCI bus */
},
//#endif
#if 0
.pio_bitmap = {
[ 0/8 ... 0x3f/8] = -1,
[ 0x48/8 ... 0x5f/8] = -1,
[ 0x68/8 ... 0x6f/8] = -1,
[ 0x78/8 ... 0x3af/8] = -1,
[ 0x3e0/8 ... 0xcff/8] = -1,
[ 0xd00/8 ... 0xffff/8] = 0, /* HACK: PCI bus */
},
#endif
.pci_devices = {
/* PCIDevice: 00:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0x0,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:01.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0x8,
.bar_mask = {
0xff000000, 0x00000000, 0xfffff000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:02.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0x10,
.bar_mask = {
0xfffe0000, 0xffffffc0, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1b.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0xd8,
.bar_mask = {
0xffffc000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 1,
.num_msi_vectors = 1,
.msi_64bits = 1,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0xf8,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0xfa,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0xffffffe0, 0xfffff000,
},
.caps_start = 1,
.num_caps = 2,
.num_msi_vectors = 1,
.msi_64bits = 1,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0xfb,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0xffffffc0, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
},
.pci_caps = {
/* PCIDevice: 00:1b.0 */
{
.id = 0x5,
.start = 0x60,
.len = 14,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:1f.2 */
{
.id = 0x5,
.start = 0x80,
.len = 14,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x12,
.start = 0xa8,
.len = 2,
.flags = 0,
},
},
};
jailhouse_log
Description: Binary data
