terça-feira, 5 de Março de 2019 às 15:16:43 UTC, J. Kiszka escreveu: > On 05.03.19 13:58, João Reis wrote: > > terça-feira, 5 de Março de 2019 às 12:29:48 UTC, J. Kiszka escreveu: > >> On 05.03.19 13:12, João Reis wrote: > >>> terça-feira, 5 de Março de 2019 às 09:32:12 UTC, J. Kiszka escreveu: > >>>> On 04.03.19 15:31, João Reis wrote: > >>>>> sexta-feira, 1 de Março de 2019 às 15:42:04 UTC, J. Kiszka escreveu: > >>>>>> On 01.03.19 16:04, João Reis wrote: > >>>>>>> As i didn't find documentation that supports bit by bit information > >>>>>>> of GICD registers (as you can see by gicd_registers.png), i have to > >>>>>>> ask you what do i change in .irqchips field. > >>>>>>> > >>>>>> > >>>>>> You do not need to look at the GICD registers in order to assign > >>>>>> interrupts to > >>>>>> different cells. That's what Jailhouse is doing for you. All you need > >>>>>> to know is > >>>>>> which interrupt (SPI number + 32) each device is using. Then you can > >>>>>> turn on > >>>>>> access to that by setting the corresponding bit in the irqchip > >>>>>> configuration of > >>>>>> Jailhouse. > >>>>>> > >>>>>>> Where do i insert the modified inmate-zynqmp.dtb file? When i issue > >>>>>>> "cell create"? > >>>>>>> > >>>>>> > >>>>>> You pass that dtb to "cell linux". > >>>>>> > >>>>>> Jan > >>>>>> > >>>>>> -- > >>>>>> Siemens AG, Corporate Technology, CT RDA IOT SES-DE > >>>>>> Corporate Competence Center Embedded Linux > >>>>> > >>>>> I don't want to load linux on a non-root cell, i just want to create a > >>>>> non-root cell that shares memory with root cell, but that non-root cell > >>>>> must use UART1 and root cell UART0. So i suppose i must not issue "cell > >>>>> linux" because that command, besides creating a cell, loads linux on > >>>>> that cell. > >>>>> > >>>> > >>>> Then you do not need to touch a device tree but the cell config > >>>> (.console) and > >>>> use an inmate that evaluates that (like our demo inmates). Note that our > >>>> inmates > >>>> do not use the UART IRQ, they just poll the device for being able to > >>>> write to > >>>> the console. > >>>> > >>>> Jan > >>>> > >>>> -- > >>>> Siemens AG, Corporate Technology, CT RDA IOT SES-DE > >>>> Corporate Competence Center Embedded Linux > >>> > >>> Ok, so i've changed the non-root cell to output and input to UART0, can > >>> you tell me if the changes are correct? I still can't see anything on > >>> UART0. > >>> > >> > >> Does it start to show anything if you have a corresponding "cat > >> /dev/ttyPSx" > >> running under Linux? > >> > >> What may be the case is that Linux shut down (or never started) the clock > >> that > >> drives the other UART when that channel is not in use. The inmate driver > >> is not > >> taking care of that either (and may not even have access to the clocks). > >> > >> Jan > >> > >> -- > >> Siemens AG, Corporate Technology, CT RDA IOT SES-DE > >> Corporate Competence Center Embedded Linux > > > > Inside /dev directory, i've only got ttyPS0 (on bootload both ttyPS0 and > > ttyPS1 appear saying they are xuartps, and ttyPS1 is registered, but only > > ttyPS0 is enabled, the following message appears: > > console [ttyPS0] enabled > > > > ttyPS1 is not enabled) > > > > Are you sure there are more UARTs available at all on that board? Or maybe it > takes a different FPGA bitstream to instantiate some (IIRC, the single one we > are using as console is in FPGA as well). Maybe check back with the Ultra96 > community on that, or Xilinx. > > In any case, Linux is the first stop to explore and test the available UARTs, > and that possibly even before Jailhouse is running. Once that works, > transferring ownership to other cells is much easier to configure correctly. > > Jan > > -- > Siemens AG, Corporate Technology, CT RDA IOT SES-DE > Corporate Competence Center Embedded Linux
I've finally solved the problem. Although i still can't make the second inmate output to UART0 (just outputs to UART1), the UART1 doesn't freeze no more when i issue "cell create non-root cell". I'll tell the steps i took to make this happen (warning: i don't know if each of these steps is really necessary to solve this problem): 1) The first thing i did was to make my own FPGA design, by routing the 2 PS UARTs to the low speed headers. I removed the FPGA UARTs that came with Ultra96 BSP. 2) The second step was to deattach the UART0 from bluetooth drive in system-user.dtsi file (sent in attachment) by removing the bluetooth node. 3) Then, i've changed the pin_bitmap of irqchips field to the UART0's interrupt. ( 1 << (53 - 32) ) I've noticed that i could change the uart and console field to UART0 that it would still be freezing. Only when i changed the pin bitmap to UART0 interrupt, it would not freeze (i suppose that the change of interrupt means that the 2 UARTs do not collide in terms of input). -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
