On 13.05.19 12:54, Hakkı Kurumahmut wrote:
13 Mayıs 2019 Pazartesi 10:40:24 UTC+3 tarihinde [email protected] yazdı:
Le dimanche 12 mai 2019 09:51:04 UTC+2, Jan Kiszka a écrit :
On 10.05.19 15:11, jeanne***.com wrote:
Hello everyone,
I'm still trying to get my rootCell running. I have for the moment connected a
serial port in order to have the logs in full (in ssh the communication was
down before I could have the logs). After solving some minor errors (such as
Invalid MMIO/RAM read or IO-port) I find myself with an error that I can't
explain:
VT-d fault event reported by IOMMU 1:
Source Identifier (bus:dev.func): 03:00.0
Fault Reason: 0x22 Fault Info: 38000000000 Type 0
VT-d fault event reported by IOMMU 1:
Source Identifier (bus:dev.func): 03:00.0
Fault Reason: 0x22 Fault Info: 3c000000000 Type 0
VT-d fault event reported by IOMMU 1:
Source Identifier (bus:dev.func): 03:00.0
Fault Reason: 0x22 Fault Info: 39000000000 Type 0
VT-d fault event reported by IOMMU 1:
Source Identifier (bus:dev.func): 03:00.0
Fault Reason: 0x22 Fault Info: 3b000000000 Type 0
Is the new sysfs-parser.py the cause of my trouble or is there anything I
missed in the configuration ?
Could be. 0x22 means that the device is not present in the interrupt remapping
table of IOMMU that is responsible for that device. Try changing the .iommu
number for that device from 0 to 1 or the other way around. Or is there no entry
for 03:00.0 at all?
Jan
Hello everyone,
You can find in attachment my new jailhouse-config-collect. It's actually when y try to
enable my root-cell that I have this error so my root-cell is not running and I can't do
the "jailhouse cell list".
As Jan said I tried to change the .iommu from 1 to 0 for the PCI 03:00.0 but
that doesn't change the error ...
best regards,
Actually, I done double check for patch. It is parsing everything
satisfactorily. Also, I parsed DMAR manually. System has two DRHD structure for
DMAR0 (20:dev.fn subsystems) and DMAR1 (DRHD.flags set INCLUDE_PCI_ALL for the
others) Thus, 3:0.0 pci device is assigned to DMAR-1 (iommu-1)
I also attached new patched script file for suitable new next branch. I am
planning to release the patch at new mail and subject (git format-patch).
@Jan
I have a question about the patch. assign_iommu_info and append_comment_info new methods is running
for "PCI Express Root Port" or "PCI bridge" primary and secondary bus,dev,fn.
I'm not sure it should work for the primary bus,dev,fn. It doesn't affect the
result. But I think it shouldn't work.
Do you have any idea?
Not yet. I need to read into the details again, likely over the next days, and
then I'll come back.
Jan
Example Device Scope: (00:1c.7 PCI bridge)
01 0A 00 00 00 00 1C 07 00 00
01 0A 00 00 00 00 1C 07 00 02
01 0A 00 00 00 00 1C 07 00 04
It is running order
1.) 00:1C.07
2.) sec-bus:00.00
3.) 00:1C.07
4.) sec-bus:00.02
5.) 00:1C.07
6.) sec-bus:00.04
May be it is run for only secondary buses.
1.) sec-bus:00.00
2.) sec-bus:00.02
3.) sec-bus:00.04
000000h 44 4D 41 52 44 04 00 00 DMARD... length:00000444
000008h 01 69 48 50 20 20 20 20 .iHP
000010h 50 72 6F 4C 69 61 6E 74 ProLiant
000018h 01 00 00 00 D2 04 00 00 ....Ò...
000020h 2E 16 00 00 2D 03 00 00 ....-...
000028h 00 00 00 00 00 00 00 00 ........
000030h 00 00 B0 00 00 00 00 00 ..°..... structType: 0000 (DRHD),
structLength: 00B0 flags: 00
000038h 00 E0 EF FB 00 00 00 00 .àïû.... base: FBEFE000 (dmar0)
000040h 02 08 00 00 00 20 00 00 ..... .. PCI Sub-hierarchy
000048h 02 08 00 00 00 20 01 00 ..... .. PCI Sub-hierarchy
000050h 02 08 00 00 00 20 01 01 ..... .. PCI Sub-hierarchy
000058h 02 08 00 00 00 20 02 00 ..... .. PCI Sub-hierarchy
000060h 02 08 00 00 00 20 02 01 ..... .. PCI Sub-hierarchy
000068h 02 08 00 00 00 20 02 02 ..... .. PCI Sub-hierarchy
000070h 02 08 00 00 00 20 02 03 ..... .. PCI Sub-hierarchy
000078h 02 08 00 00 00 20 03 00 ..... .. PCI Sub-hierarchy
000080h 02 08 00 00 00 20 03 01 ..... .. PCI Sub-hierarchy
000088h 02 08 00 00 00 20 03 02 ..... .. PCI Sub-hierarchy
000090h 02 08 00 00 00 20 03 03 ..... .. PCI Sub-hierarchy
000098h 03 08 00 00 0A 20 05 04 ..... .. IOAPIC
0000A0h 01 08 00 00 00 20 04 00 ..... .. PCI Endpoint Device
0000A8h 01 08 00 00 00 20 04 01 ..... .. PCI Endpoint Device
0000B0h 01 08 00 00 00 20 04 02 ..... .. PCI Endpoint Device
0000B8h 01 08 00 00 00 20 04 03 ..... .. PCI Endpoint Device
0000C0h 01 08 00 00 00 20 04 04 ..... .. PCI Endpoint Device
0000C8h 01 08 00 00 00 20 04 05 ..... .. PCI Endpoint Device
0000D0h 01 08 00 00 00 20 04 06 ..... .. PCI Endpoint Device
0000D8h 01 08 00 00 00 20 04 07 ..... .. PCI Endpoint Device
===============================================
0000E0h 00 00 28 00 01 00 00 00 ..(..... structType: 0000 (DRHD),
structLength: 0028 flags: 01
0000E8h 00 E0 FF F4 00 00 00 00 .àÿô.... base: F4FFE000 (dmar1)
0000F0h 03 08 00 00 08 00 1E 01 ........ IOAPIC
0000F8h 03 08 00 00 00 00 05 04 ........ IOAPIC
000100h 04 08 00 00 00 00 1F 00 ........ MSI_CAPABLE_HPET
--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux
--
You received this message because you are subscribed to the Google Groups
"Jailhouse" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
To view this discussion on the web visit
https://groups.google.com/d/msgid/jailhouse-dev/13823dbb-3cdb-03f0-f642-c28edf7fa6e2%40siemens.com.
For more options, visit https://groups.google.com/d/optout.
