Add processor.h. We have 32x 64-Bit registers, x0-x32. x0 is the zero register. In our case, let's place the program counter at its location.
Signed-off-by: Ralf Ramsauer <[email protected]> --- hypervisor/arch/riscv/include/asm/processor.h | 47 ++++++++++++++++++- 1 file changed, 45 insertions(+), 2 deletions(-) diff --git a/hypervisor/arch/riscv/include/asm/processor.h b/hypervisor/arch/riscv/include/asm/processor.h index 8d4b1c60..f839d1f4 100644 --- a/hypervisor/arch/riscv/include/asm/processor.h +++ b/hypervisor/arch/riscv/include/asm/processor.h @@ -2,9 +2,11 @@ * Jailhouse, a Linux-based partitioning hypervisor * * Copyright (c) Siemens AG, 2020 + * Copyright (c) OTH Regensburg, 2022 * * Authors: - * Jan Kiszka <[email protected]> + * Konrad Schwarz <[email protected]> + * Ralf Ramsauer <[email protected]> * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. @@ -16,18 +18,59 @@ #include <jailhouse/types.h> union registers { -}; + struct { + unsigned long pc; /* x0 is zero register, in our case it's PC */ + unsigned long ra; + unsigned long sp; + unsigned long gp; + unsigned long tp; + unsigned long t0; + unsigned long t1; + unsigned long t2; + unsigned long s0; + unsigned long s1; + unsigned long a0; + unsigned long a1; + unsigned long a2; + unsigned long a3; + unsigned long a4; + unsigned long a5; + unsigned long a6; + unsigned long a7; + unsigned long s2; + unsigned long s3; + unsigned long s4; + unsigned long s5; + unsigned long s6; + unsigned long s7; + unsigned long s8; + unsigned long s9; + unsigned long s10; + unsigned long s11; + unsigned long t3; + unsigned long t4; + unsigned long t5; + unsigned long t6; + }; + struct riscv_raw_registers { + unsigned long x[32]; + } raw; +} __attribute__ ((__aligned__ (1 << (7 - 3) /* bits/byte */))); +/* RISC-V ABI requires 128-bit stack alignment */ static inline void cpu_relax(void) { + asm volatile("" : : : "memory"); } static inline void memory_barrier(void) { + asm volatile("fence rw, rw" : : : "memory"); } static inline void memory_load_barrier(void) { + asm volatile("fence r, rw" : : : "memory"); } #endif /* !_JAILHOUSE_ASM_PROCESSOR_H */ -- 2.36.1 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/20220627132905.4338-7-ralf.ramsauer%40oth-regensburg.de.
