Hi Seb, I tried this but does not run on my computer, because it is not so easy to invoke JAL with my setup. Later this week (or in the next two weeks of holiday :) I'll try and setup a directory with all required settings and retry.
I do like the general idea that all board/test combinations are generated. There are some issue's to concider though: 1. there could be multiple board files for one pic-type (if others start to use board/test files). I think there should only be one of them used for sample generation. Maybe put a keyword in the board file to indicate it should be used for sample generation? 2. Compile is a good way to filter out samples that won't work for sure. And we agreed that we can't test everything. But if we discover that a certain combination won't work, what can we do? Fix it is the most obvious. But if we can't within a short time? The best option i see now is to check for known not-working devices in the lib and throw a compile error. And to reduce the number of incorrect (compilable but not working examples) is to check for required bits in stead of registers. ADC on 16f88 is an example - setup is not properly supported, but since the register name is the same (but not the bit fields within the chip) it compiles and most of adc works. Setting the bits would break compilation (is that what we want in this case?) but would also help to prevent incorrect samples... Bbut now I am back at the famous hardware version issue and this is not directly related to sample generation. But the short version of my message: this is a mayor step in the right direction. In time we should be able to handle multiple board files for the same chip. Joep --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "jallib" group. To post to this group, send email to [email protected] To unsubscribe from this group, send email to [email protected] For more options, visit this group at http://groups.google.com/group/jallib?hl=en -~----------~----~----~----~------~----~------~--~---
