I may be wrong but Mplab X is going to be more of a true editor with more
plugins
Don't get me wrong but your using the Device files in Mplab C:\Program
Files\Microchip
\MPLAB IDE\Device
Swordfish proton use the ones in Mpasm there easy to read
LIST
; P12F508.INC Standard Header File, Version 1.00 Microchip Technology,
Inc.
NOLIST
; This header file defines configurations, registers, and other useful bits
of
; information for the PIC12F508 microcontroller. These names are taken to
match
; the data sheets as closely as possible.
; Note that the processor must be selected before this file is
; included. The processor may be selected the following ways:
; 1. Command line switch:
; C:\ MPASM MYFILE.ASM /P12F508
; 2. LIST directive in the source file
; LIST P=12F508
; 3. Processor Type entry in the MPASM full-screen interface
;==========================================================================
;
; Revision History
;
;==========================================================================
;Rev: Date: Reason:
;1.00 12/09/03 Initial Release
;==========================================================================
;
; Verify Processor
;
;==========================================================================
IFNDEF __12F508
MESSG "Processor-header file mismatch. Verify selected
processor."
ENDIF
;==========================================================================
;
; Register Definitions
;
;==========================================================================
W EQU H'0000'
F EQU H'0001'
;----- Register Files -----------------------------------------------------
INDF EQU H'0000'
TMR0 EQU H'0001'
PCL EQU H'0002'
STATUS EQU H'0003'
FSR EQU H'0004'
OSCCAL EQU H'0005'
GPIO EQU H'0006'
;----- STATUS Bits --------------------------------------------------------
GPWUF EQU H'0007'
PA0 EQU H'0005'
NOT_TO EQU H'0004'
NOT_PD EQU H'0003'
Z EQU H'0002'
DC EQU H'0001'
C EQU H'0000'
;----- OPTION Bits --------------------------------------------------------
NOT_GPWU EQU H'0007'
NOT_GPPU EQU H'0006'
T0CS EQU H'0005'
T0SE EQU H'0004'
PSA EQU H'0003'
PS2 EQU H'0002'
PS1 EQU H'0001'
PS0 EQU H'0000'
;----- OSCCAL Bits --------------------------------------------------------
CAL6 EQU H'0007'
CAL5 EQU H'0006'
CAL4 EQU H'0005'
CAL3 EQU H'0004'
CAL2 EQU H'0003'
CAL1 EQU H'0002'
CAL0 EQU H'0001'
;==========================================================================
;
; RAM Definition
;
;==========================================================================
__MAXRAM H'1F'
;==========================================================================
;
; Configuration Bits
;
;==========================================================================
_MCLRE_ON EQU H'0FFF'
_MCLRE_OFF EQU H'0FEF'
_CP_ON EQU H'0FF7'
_CP_OFF EQU H'0FFF'
_WDT_ON EQU H'0FFF'
_WDT_OFF EQU H'0FFB'
_LP_OSC EQU H'0FFC'
_XT_OSC EQU H'0FFD'
_IntRC_OSC EQU H'0FFE'
_ExtRC_OSC EQU H'0FFF'
LIST
This is the same thing but it's not near as readable
######################################################################
#
# MPLAB IDE .dev File Generated by `pic2dev.py'
#
# Device: PIC12F508
# Family: 16c5x
# Datasheet: 41236
# Date: Thu Jun 10 16:05:37 2010
#
######################################################################
######################################################################
#
# Memory Regions & Other General Device Information
#
######################################################################
vpp (range=10.000-12.000 dflt=11.000)
vdd (range=2.500-5.500 dfltrange=3.000-5.500 nominal=5.000)
pgming (memtech=ee tries=1 lvpthresh=0)
wait (pgm=3000 eedata=2000 cfg=2000 userid=2000 erase=10000 lvpgm=2000)
latches (pgm=1 eedata=1 cfg=1 userid=1)
EraseAlg=1
HWStackDepth=2
breakpoints (numhwbp=1 datacapture=false idbyte=x)
calmem (region=0x1ff-0x1ff)
testmem (region=0x200-0x23f)
userid (region=0x200-0x203)
cfgmem (region=0xfff-0xfff)
pgmmem (region=0x0-0x1ff)
NumBanks=1
######################################################################
#
# Special Function Registers
#
######################################################################
sfr (key=INDF addr=0x0 size=1 flags=i access='u u u u u u u u')
reset (por='--------' mclr='--------')
bit (names='INDF' width='8')
sfr (key=TMR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
reset (por='xxxxxxxx' mclr='uuuuuuuu')
bit (names='TMR0' width='8')
stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
reset (por='11111111' mclr='11111111')
bit (names='PCL' width='8')
stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=STATUS addr=0x3 size=1 access='rw u u r r rw rw rw')
reset (por='0--11xxx' mclr='q--qquuu')
bit (names='GPWUF - - nTO nPD Z DC C' width='1 1 1 1 1 1 1 1')
sfr (key=FSR addr=0x4 size=1 access='r r r rw rw rw rw rw')
reset (por='111xxxxx' mclr='111uuuuu')
bit (names='FSR' width='8')
stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=OSCCAL addr=0x5 size=1 access='rw rw rw rw rw rw rw u')
reset (por='xxxxxxx-' mclr='uuuuuuu-')
bit (names='CAL -' width='7 1')
sfr (key=GPIO addr=0x6 size=1 access='u u rw rw r rw rw rw')
reset (por='--xxxxxx' mclr='--uuuuuu')
bit (names='- - GP5 GP4 GP3 GP2 GP1 GP0' width='1 1 1 1 1 1 1 1')
bit (tag=scl names='GP' width='8')
stimulus (scl=rwb pcfiles=rw regfiles=rw)
######################################################################
#
# Non Memory-Mapped Registers
#
# (Conditionally visible SFRs appear as NMMRs in the "Special Function
# Registers" section.)
#
######################################################################
HasNMMR=1
nmmr (key=WREG addr=0x0 size=1 access='rw rw rw rw rw rw rw rw')
reset (por='qqqqqqqq' mclr='qqqqqqqq')
bit (names='WREG' width='8')
nmmr (key=STKPTR addr=0x1 size=1 flags=h access='rw rw rw rw rw rw rw rw')
reset (por='00000000' mclr='00000000')
bit (names='STKPTR' width='8')
nmmr (key=TRISIO addr=0x3 size=1 access='u u rw rw rw rw rw rw')
reset (por='--111111' mclr='--111111')
bit (names='- - TRISIO5 TRISIO4 TRISIO3 TRISIO2 TRISIO1 TRISIO0'
width='1 1 1 1 1 1 1 1')
nmmr (key=OPTION_REG addr=0x5 size=1 access='rw rw rw rw rw rw rw rw')
reset (por='11111111' mclr='11111111')
bit (names='nGPWU nGPPU T0CS T0SE PSA PS' width='1 1 1 1 1 3')
NMMRObjSize=4
######################################################################
#
# Configuration Registers
#
######################################################################
cfgbits (key=CONFIG addr=0xfff unused=0x0)
field (key=OSC mask=0x3 desc="Oscillator Selection bits")
setting (req=0x3 value=0x3 desc="external RC oscillator")
setting (req=0x3 value=0x0 desc="LP oscillator")
setting (req=0x3 value=0x1 desc="XT oscillator")
setting (req=0x3 value=0x2 desc="internal RC oscillator")
field (key=WDT mask=0x4 desc="Watchdog Timer Enable bit")
setting (req=0x4 value=0x4 desc="Enabled")
setting (req=0x4 value=0x0 desc="Disabled")
field (key=CP mask=0x8 desc="Code Protection bit")
setting (req=0x8 value=0x8 desc="Disabled")
checksum (type=0x0 protregion=0x0-0x0)
setting (req=0x8 value=0x0 desc="Enabled")
checksum (type=0x20 protregion=0x40-0x1fe)
field (key=MCLRE mask=0x10 desc="GP3/MCLR Pin Function Select bit")
setting (req=0x10 value=0x10 desc="Enabled")
setting (req=0x10 value=0x0 desc="Disabled")
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