Hi Steven, Good catch, thank you for the report. It should be already fixed (a3562b35 and later).
Regards, Orson On 03/07/2018 06:28 AM, Strontium wrote: > Sorry for posting this, AND also posting a bug report, but i know you > guys are close to releasing a V5 and i have been testing RC2 from > nightly PPA and have hit two bugs which would be show stoppers for me, > and make me want to go back to V4. > > First one is a problem with Zone refills using DRC. > > If I have a zone, and place a via or track over it from another net. > And then do a DRC, but select "Refill all zones..." then the DRC > proceeds without error, and says it refilled the Zone. > > However, a visual inspection of the board shows, no the zone did not > refill and the via and zone now clash because they are not the same net, > but there is no DRC violation. > > Thats what it looks like. But what is really happening is the zone is > being recalculated, and the DRC is passing because the Zone does now > actually flow properly around the net overlapping it. BUT what happens > is the board is not redrawn to show the new zone outline. Zooming > around the board, etc, does not cause it to redraw either. The only > ways i have found to make it redraw is to manually select the zone for > editing, or to press "B" > > Its a highly disconcerting problem, because the board that kicad > "understands" and the one it "displays" are out of sync. > > The effect is obvious when one does a 3d render of the board, because > that shows the board that kicad understands, even though in the pcb > editor its shown as not that. as shown here: > http://i.imgur.com/hKfPJ22.png > > the other problem i will post separately. > > Steven > > > _______________________________________________ > Mailing list: https://launchpad.net/~kicad-developers > Post to : email@example.com > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp
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