I'm finnishing my board and found something strange. The DRC reports no errors but I can see that a via is missing and that there is no visual connection between the 2 segmenents.
Can anyone take a look at the board uploaded to the files section in "Files > Magnus B > jdd-pcb-b.brd" and try to clear this out. The missing via is located left to L310 connecting layer 1 and layer 2. I'm not sure this is a bug or just me who can't run the DRC... Regards, Magnus Beischer KiCad 2007-11-29-b, WinXP.
