I believe I know what happened, it was to some degree a problem with 
mixing eeschema versions between different engineers working on the 
same project.
Two of the sheets were developed separately, one root containing one 
child sheet. We then added that root sheet to another schematic as a 
child sheet. The name of the child sheet that had been the root was 
changed. One of the nets that contained several erroneously merged 
nets had the same name as the previous root schematic. I believe at 
some point in time one of the schematics was manually edited and some 
of the sheet timestamps had been removed. Interestingly enough, 
eeschema still rendered the schematics correctly.
I guess the only complaint I have is the lack of verbose diagnostics 
in the schematic to netlist conversion. I had to find the errors in 
PCB, emitters and collectors of transistors being shorted together 
and the like.

Thanks for your consideration and timely response.

--- In, jean-pierre charras <jean-
> daystar1013 a écrit :
> >
> > The new format for eeschema appears to be causing problems with 
> > labels, global labels, and the new hierarchical label when 
> > netlists.
> > I am working with a schematic that several people have been 
working on.
> > It has a root sheet, a sheet inside the root and another one in 
> > second level sheet.
> > When the netlist was generated nets were merged for no apparent 
> > and given names that were not specified on any net. The PCB
> > interconnectivity was really screwed up.
> >
> "New" hierarchical labels are the old global labels. the current 
> labels are new and are actually "globals" (as said in new doc)
> I have no problem with new eeschema labels handling.
> So, can you send me your kicad project ?
> -- 
> Jean-Pierre CHARRAS
> Maître de conférences
> Directeur d'études 2ieme année.
> Génie Electrique et Informatique Industrielle 2
> Institut Universitaire de Technologie 1 de Grenoble
> BP 67, 38402 St Martin d'Heres Cedex
> Recherche :
> 46,  Avenue Félix Viallet
> 38031 Grenoble cedex

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