kelsey hudson wrote:
Keep in mind that voltage and current are inversely proportionate and
directly relate to how much power the chip consumes: a basic principle
of electronics (Ohm's law) states that voltage equals current times
resistance;
Did you ever wonder why chips are all trying to lower their voltages
given that VI=P and V=IR? It would seem to be a net wash.
*However*, CMOS technologies that we use in modern VLSI chips are, to a
first order approximation, purely capacitive loads (not so true as we
get down to 45nm, but that's for a different day). They behave a bit
differently.
Basically, CMOS gates behave as two switches (one each to Vdd and GND)
which either dump charge onto a capacitive load from Vdd or pull charge
off of a capacitive load and dump it to ground.
If your grind through a bit of (not too hard) mathematics, you wind up
with an interesting result:
P = k C V^2 f where k is a constant of proportionality
Therefore, we have:
Power is linearly proportional to Capacitance
Capacitance is pretty much set by technology and size of chip. Not a
lot you can do.
Power is linearly proportional to Frequency
This is why we don't see a lot of 4GHz chips floating around. They burn
twice as much power as 2GHz and the overhead of trying to run something
that fast eats into the time to do actual work. So you burn twice the
power but don't quite get twice the performance. There is a "sweet
spot" where 60-70% of your on chip logic arrives "just in time". That
pretty much sets your optimally efficient performance and power.
Power is *quadratically* proportional to Voltage
This is *huge*. If you manage to halve your voltage, you cut your power
to 1/4 of the original consumption. However, running chips at lower
voltages hurts performance in various ways, so, again, there is a point
at which you stop going much lower. For now, the limit appears to be
about .8V. Much lower than that and you have to start doing some major
tricks to keep your performance up.
And now you know ...
-a
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