Andrew Lentvorski wrote:
Also, interrupts on a normal x86 system pass through a bunch of chips before actually hitting the processor in order to handle "legacy" issues. Those are normally quite slow, as well.
I think it was you who told me one night at Denny's a few months ago that an x86 chip spends a third of its power budget in decode because of how complicated the instruction set is, largely to legacy issues. I know the MMU is horrendously complicated also due to memory issues. When I was studying x86 assembly back in the day we used segment and offset and ran our code under DOS. About a year ago I read "Programming From The Ground Up" (which I highly recommend, took me a week or so of evenings to read through it) and it covers how assembly works on x86 in a Linux environment and the memory model it runs in didn't even exist the last time I coded assembly. I really hope either Intel does some housecleaning on the x86 and breaks backwards compatibility or some other cheap and powerful cpu comes along (which doesn't seem likely short of a technological miracle due to the cheapness of x86 being due to mass production).
Perhaps with massively multicore stuff coming along we can eventually dedicate a whole core to interrupt processing which seems like it should really improve things.
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