Bob La Quey wrote:
The core problem for CISC and RISC emulating CISC is
=======================================
INT Call interrupt procedure
operands bytes 8088 186 286 386 486 Pentium
3 1 72 45 23+m 33 26
13 NP
imm8 2 71 47 23+m 37 30
16 NP
========================================
http://www.emboss.co.nz/pentopt/opcode_i.html
The interrupt response takes many clock cycles.
Andy can perhaps shed some light on the modern state
of affairs.
Your little chart is completely garbled for me. It seems to be suffering
from design with proportional fonts instead of fixed width fonts. Is
there someplace where this is laid out so it will make sense?
Gus
--
[email protected]
http://www.kernel-panic.org/cgi-bin/mailman/listinfo/kplug-lpsg
