On Wed, Nov 24, 2010 at 10:43:57AM -0600, Anthony Liguori wrote:
> On 11/24/2010 10:21 AM, Gleb Natapov wrote:
> >On Wed, Nov 24, 2010 at 06:14:22PM +0200, Avi Kivity wrote:
> >>On 11/24/2010 06:12 PM, Gleb Natapov wrote:
> >>>> Why would we specify a PIIX3 device based on a configuration file?
> >>>> There is only one PIIX3 device in the world. I don't see a lot of
> >>>> need to create arbitrary types of devices.
> >>>>
> >>>Why deny this flexibility from those who need it for modelling
> >>>different HW?
> >>The various components exist and can be reused.
> >>
> >So you are saying lets use code as data for some and config files for
> >others. If you have support for building chipsets from data why not
> >simply have 440fx.cfg somewhere? Besides what qemu provides no is not
> >stock PIIX3. We have parts of PIIX4 for power management.
> >
> >>>Besides, as I said, PIIX3 is ISA bridge and this
> >>>is what class should implement.
> >>Isn't it an ISA bridge + a few ISA devices?
> >>
> >Why? Because they happen to be on the same silicon? So then in SoC
> >all devices are in cpu?
>
> They *aren't* ISA devices. Look at the PIIX3 spec. All of the
> ports for these devices are positively decoded and not sent over the
> ISA bus.
>
Over the external ISA bus you mean?
> You could model them as being behind the ISA bus but you could also
> model them as being behind the PCI bus.
>
Just yesterday I checked how different ports behave if you use inw/inl
to read data from them. They behave very different from what PCI spec
says. This was recent HW.
--
Gleb.
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