Hi Jeff,

I'm having a really hard time reading your source code as fragments.
For example in your timer2_setup there is a "#endif" in the middle of
it, where is the preceding #if? Did the timer code get compiled in?

It looks like you've got the basic concepts there but it is hard to tell.

I only see the 'jobygps' systems as an F2 example system in the
libopencm3-examples repo but if you look at some of the other examples
they might show you something you missed?

Consider setting up a free github account and pushing a copy of your
source there so that it can be read in its entirety, then it will be
easier to talk about things that might help.

--Chuck


On Mon, Jan 13, 2014 at 2:32 PM, skeezix <[email protected]> wrote:
>
>         Does anyone have a libopencm3 based example, against the STM32 F2,
> that illustrates ISR's invoking based on timers?
>
>         I did try using a couple of the examples (see timer.c) in the F1
> directory to no avail; I've got a few attempts at it, and it looks like
> (guessing, didn't hook up a debugger yet) the ISR is just not being
> called.
>
>         This is just the bare STM32F205RE sitting in a breadboard, with a
> crystal and some caps. (No dev/eval board.)
>
>         // set to 120MHz - success
>         rcc_clock_setup_hse_3v3 ( &hse_8mhz_3v3 [ CLOCK_3V3_120MHZ ] );
>
>         The good bits .. mostly ripped from examples :)
>
> static void nvic_setup(void) {
>    nvic_enable_irq(NVIC_TIM2_IRQ);
>    nvic_set_priority(NVIC_TIM2_IRQ, 1);
> }
>
> static void timer2_setup ( void ) {
>
>    /* Enable TIM2 clock. */
>    rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM2EN);
>
>    /* Set timer start value. */
>    TIM_CNT(TIM2) = 1;
>
>    /* Set timer prescaler. 72MHz/1440 => 50000 counts per second. */
>    TIM_PSC(TIM2) = 2000; // 120M/2000 = 60k/second
>
>    /* End timer value. If this is reached an interrupt is generated. */
>    TIM_ARR(TIM2) = 60000;
>
>    /* Update interrupt enable. */
>    TIM_DIER(TIM2) |= TIM_DIER_UIE;
>
>    /* Start timer. */
>    TIM_CR1(TIM2) |= TIM_CR1_CEN;
>
> #endif
>
>    return;
> }
>
> void tim2_isr ( void ) {
>
>    GPIO_ODR(GPIOC) ^= GPIO3; // GPIO stuff works fine, outside of the ISR
>
>    TIM2_SR &= ~TIM_SR_UIF;    //clearing update interrupt flag
>    //TIM_SR(TIM2) &= ~TIM_SR_UIF; /* Clear interrrupt flag. */
> }
>
> .. and the relevent bits of main:
>
> #if 1
>    //__enable_irq();
>    cm_enable_interrupts();
>
>    gpio_setup();
>    gpio_set ( GPIOC, GPIO3 );
>
>    nvic_setup();
>
>    timer2_setup();
>
>    while ( 1 ) {
>      __asm__("nop");
>    } // while forever
> #endif
>
>         Now, on the other hand, the code below works -- not using an ISR,
> just polling things:
>
>         polling timer setup:
> #if 0 // simple manual setup
>    rcc_peripheral_enable_clock ( &RCC_APB1ENR, RCC_APB1ENR_TIM2EN );
>
>    // 120,000,000 / 1000 == 120,000
>    TIM2_CR1 |= TIM_CR1_CEN;
>    TIM2_PSC = 1000;     //setting prescaler to 1000
>    TIM2_ARR = 60000;    //auto reload value adjusted for 1 second
> #endif
>
>         polling timer check:
> #if 0
>    gpio_setup();
>    gpio_set ( GPIOC, GPIO3 );
>
>    timer2_setup();
>
>    while ( 1 ) {
>
>      while (!(TIM2_SR & (TIM_SR_UIF))) ;    //polling for update interrupt
> flag
>
>      TIM2_SR &= ~TIM_SR_UIF;    //clearing update interrupt flag
>
>      GPIO_ODR(GPIOC) ^= GPIO3;
>
>    } // while forever
> #endif
>
>         So much of the code is working fine, but I'm obviously missing
> something to enable the ISR itself :)
>
>         Any tips?
>
>                 jeff
>
>
> --
> If everyone would put barbecue sauce on their food, there would be no war.
>
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