> Zdenek Kabelac wrote:
> > Anyway I'll try to use binary halving to find some more reasonable
> > value - but maybe other people with the same problem could try
> > this by themself.
> >
> > (value 120 = 0x78 seems to be to low - 0x98 to high)
>
> The PCI latency timer was intended to be calculated by teh BIOS.
>
> PCI devices declare "I have a buffer for 4 microseconds" and another
> device may say "I have a buffer for 10 microseconds".
>
I think I was judging to early - I think the deadlock happens with
any value of PCI latency & UDMA 4 - sometimes it just takes longer.
So I think this is wrong way to :(
--
There are three types of people in the world:
those who can count, and those who can't.
Zdenek Kabelac http://i.am/kabi/ [EMAIL PROTECTED] {debian.org; fi.muni.cz}
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