Chance Reschke wrote: > > A question: I've heard that in the 21264/EV6 SMP design all interrupts > are handled by CPU0. Is this true? Can anyone report on the impact > this has on the behavior of these systems in Beowulf configurations or > anywhere else with lots of network or disk I/O? > Yes, as far as I know that's true. It was anticipated that this would not be a problem because of the speed of response or something like that (check with Digital/Compaq). I can't answer the second half question, though. Regards.
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