Re: booting kernel on SA1110

[Nicolas Pitre]

On Thu, 27 Apr 2000, Russell King - ARM Linux Admin wrote:

> Jeff Sutherland writes:
> > Another possibility: If the Icache has not been enabled up to now, turning
> > on the buffers and the Icache initiates an 8 word burst transfer on the
> > memory buss.  If the memory timing is not set correctly, especially when
> > using SDRAMs on the SA1110, or there are other signal integrity issues, this
> > is a good time for things to blow up.  How do I know this???
> 
> I think all those issues got solved back in 2.3.5x days by doing identity
> mappings etc.  Is this a new problem with this processor?

No.  The issue was a cache coherency problem with head-sa1100.S that got
solved in my latest patch.


Nicolas


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