I am currently working with a I.mx6 quad-core-processor on Linux 3.19. I would like to implement the "I2C slave support", by Wolfram Sang, In this processor.
For this purpose, I would have some comprehension questions. Do I understand it right, I can set the Master in slave mode and the new slave get his own i2c-adresse? Say that, I can connect a Master from the outside, without this leading to problems? If the master switch to slave, then stops SCL? Or how does it work? Is the EEPROM simulator only available if I rewrote "i2c-IMX" drivers to the slave support? Does anyone know if anyone is working on this driver? In the "i.MX 6Dual/6Quad Applications Processor Reference Manual", from freescale, on the page 1895 the "Hardware"-Slave Mode will be described. Would it theoretically be enough to write 0x80 in the "I2Cx_I2CR" register to set MSTA Bit to slave mode. "Changing MSTA from 1 to 0 generates a Stop and selects Slave mode." Or then disturbs the old driver? best regards -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
