On Mon, 2009-09-28 at 15:17 -0400, Mike Frysinger wrote:
> On Mon, Sep 28, 2009 at 05:21,  <[email protected]> wrote:
> > Revision 7489 Author gyang Date 2009-09-28 05:21:51 -0400 (Mon, 28 Sep 2009)
> >
> > Log Message
> >
> > seperate defines about l1 code/cache and code only sram
> 
> why ?  the entire point was that treating it as one contiguous blob

Task [#4788], dsp-bridge may write code to l1, it's dangerous, if there
is a gap between COREB_L1_CODE_START to COREB_L1_CODE_START +
L1_CODE_LENGTH.

> makes the code a lot simpler (as your commit clearly shows).
> -mike


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