On 2016/10/19 0:03, Lorenzo Pieralisi wrote:
This patch series is v6 of a previous posting:


v5 -> v6
        - Rebased against v4.9-rc1
        - Moved platform devices creation into IORT code
        - Updated fwnode handling
        - Added default dma masks initialization

v4 -> v5
        - Added SMMUv1/v2 support
        - Rebased against v4.8-rc5 and dependencies series
        - Consolidated IORT platform devices creation


The ACPI IORT table provides information that allows instantiating
ARM SMMU devices and carrying out id mappings between components on
ARM based systems (devices, IOMMUs, interrupt controllers).


Building on basic IORT support, this patchset enables ARM SMMUs support
on ACPI systems.

Most of the code is aimed at building the required generic ACPI
infrastructure to create and enable IOMMU components and to bring
the IOMMU infrastructure for ACPI on par with DT, which is going to
make future ARM SMMU components easier to integrate.


This patchset is provided for review/testing purposes here:


Tested on Juno and FVP models for ARM SMMU v1 and v3 probing path.

I rebased my platform MSI, interrupt producer and mbi-gen patch set
on top of yours, and test it on Hisilicon D03 board with SMMv3
enabled, USB and SAS are working properly with configuration
in IORT (yes, I need to add patch from Robin - iommu/arm-smmu: Don't
inadvertently reject multiple SMMUv3s),

Tested-by: Hanjun Guo <hanjun....@linaro.org>


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