From: Peter Senna Tschudin <peter.se...@collabora.com>
Enable secure debug enable register access for Bx50v3 devices to enable
PMU and hardware counters for perf.
Signed-off-by: Peter Senna Tschudin <peter.se...@collabora.com>
Signed-off-by: Sebastian Reichel <sebastian.reic...@collabora.co.uk>
---
Changes since PATCHv1:
* add property by adding a label to the pmu node in imx6qdl and
referencing it in bx50v3.dtsi.
---
arch/arm/boot/dts/imx6q-bx50v3.dtsi | 4 ++++
arch/arm/boot/dts/imx6qdl.dtsi | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6q-bx50v3.dtsi
b/arch/arm/boot/dts/imx6q-bx50v3.dtsi
index 916ea94d75ca..2baffc8b9094 100644
--- a/arch/arm/boot/dts/imx6q-bx50v3.dtsi
+++ b/arch/arm/boot/dts/imx6q-bx50v3.dtsi
@@ -388,3 +388,7 @@
#interrupt-cells = <1>;
};
};
+
+&pmu {
+ secure-reg-access;
+};
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 59ff86695a14..2b921de44c02 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -143,7 +143,7 @@
};
};
- pmu {
+ pmu: pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&gpc>;
interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
--
2.15.1
