On Mon, Sep 10, 2018 at 03:45:42PM +0200, Thomas Gleixner wrote: > > He has an irqchip that is called from the RISC-V exception handler > > when the interrupt flag is set in scause and then dispatches to one > > of: IPI, timer, actual irqchip. > > So the per cpu timer is the only per cpu interrupt and that thing is used > unconditionally, right?
Yes. external is chained and IPI is still handled explicitly.
