08.02.2019 19:45, Sowjanya Komatineni пишет: > This patch adds I2C interface timing registers support for > proper bus rate configuration along with meeting the I2C spec > setup and hold times based on the tuning performed on Tegra210, > Tegra186 and Tegra194 platforms. > > I2C_INTERFACE_TIMING_0 register contains TLOW and THIGH field > and Tegra I2C controller design uses them as a part of internal > clock divisor. > > I2C_INTERFACE_TIMING_1 register contains the setup and hold times > for start and stop conditions. > > Acked-by: Thierry Reding <[email protected]> > Signed-off-by: Sowjanya Komatineni <[email protected]> > ---
Reviewed-by: Dmitry Osipenko <[email protected]> Tested-by: Dmitry Osipenko <[email protected]>
